Author here. Happy to answer technical questions: about HFI BIOS, partitioning hypervisor (gRouvr), QSOE RTOS.
I hope that leading European industrial computer manufacturers notice the initiative and join -- or at least start evaluating the possibility to use RVA23 SoCs in their devices. Yes, currently only Chinese vendors can provide such chips, but the world is changing fast.
This is just a webpage some individual put up, right? I mean as far as I can see there's no institute, no company, no government behind this. Just one RISC-V enthusiast on the contact page.
These implement 16-register cut down RISC-V RV32EC_Zmmul instruction set. It's an interesting choice. I wonder if they can run Coremark or Dhrystone so one can get an impression of their performance at 48MHz.
8k RAM, 64k ROM, compressed RISC-V insn set.
Edit: Apparently it's a QingKe RISC-V with about 130 Coremark.
These are more than sufficient for simple control applications. I'm just wondering if I can run a small GUI on it driving an OLED display. That's what I'm gonna find out.
Compared to x86, which is wholly owned by an American duopoly and needs licensing to produce legally, boosting RISC-V is a major step towards chip independence for Europe. With the current state of the US it almost seems a necessity. The only downside here is that it didn't happen sooner.
While ARM Holdings is based in Cambridge, England, it is majority owned by SoftBank Group which is a Japanese investment conglomerate.
What's important in the context of a European "sovereign computing" initiative is the licensing of the instruction set architecture. Like x86, ARM is still proprietary, while RISC-V is a free and open standard.
This statement seems to be factually untrue. Mashayoshi Son owns 32-33% of Softbank and then the investors are like the Japanese Master Trust bank etc. Saudi Arabia is not even in top 10 of the investors list.
Saudi Arabia did recently invest 45 billion dollars in the vision fund which is an investment fund managed by Softbank but they haven't really invested within Softbank itself so not it is not mostly owned by Saudis from what the data can tell.
It is if you define the UK being in Europe (the continent). It isn't part of the EU as of today, although there's a good chance it will be again in the future.
Even though it's Japanese-owned most of their R&D still takes place in England.
You don't need to define the UK being in Europe. UK is and forever will be in Europe, full stop.
I know that sometimes "European" is used as a synonym for "in the EU", but most of the time this is sloppy. Nobody in Europe thinks UK is "not European".
RISC-V is IP UNlocked. I bought RISC-V mini-boards (so cheap) years ago because I was planning to build my keyboard... but I am still on other projects... and there are even better RISC-V miniboard nowdays (better USB, more GPIOs... for a full fledge BFO-9000 keyboard!).
What I am waiting for are RISC-V high performance micro-architectures which will use the best silicon node (desktop, mobile, and for servers it seems there are a few attempts). One of the main issue seems... the compressed instructions which should be removed as it increases implementation complexity significantly in order to apply some of the known high-performance optimizations (it is not anectodale if ARM removed thumb machine instructions).
I like the idea, I code as much as possible things in RISC-V assembly now, and re-use a ton of code paths (at the assembly level!). I have even written a small RISC-V interpreter for x86_64 for static exes.
Even if Intel licensed x86 no one in Europe would want to make them. Unless they're guaranteed a monopoly there will be no takers. European companies and conglomerates are extremely lazy and risk averse.
Such development boards are a completeley different thing compared to RVA23-profile RISC-V CPUs.
This is like comparing an 48MHz ARM-Cortex-M0 with the CPU in your Macbook. Yes both of them are ARM cores, but the small embedded processor has very little RAM/Flash/clockspeed, no memory management unit, no cache, no modern RAM interface.
Not even the instruction set is really the same, because you (typically) won't even have floating point instructions/registers on the small MCUs, much less vector instructions.
The Milk-V Jupiter 2 mentioned in the post is basically a full-fledged Desktop CPU and it's price is not gonna be anywhere close to $2 either...
They can run, but if one of the computer-related parts breaks down your only choice is scrounging eBay for replacement parts because (as an example) the software is proprietary and it runs on a weird MCA card with really precise timing and strong anti-piracy measures.
In the 90s and early 2000s server uptime might be counted in multiple years and extremes in the decades
The industry can barely keep an npm update from breaking the world now.. and that’s build tools and environments and so it’s independent of “we use stable languages”
Now add the possibility of political sanctions on ISA licensing and you have -
Hardware that’s fails quicker and may not be available to buy, software that barely builds months later, and a world where the US president can sanction entities at will if they don’t comply…
I do remember a Freebsd 2.2 server, that after it's setup in 98, reached 800 days of uptime without any kernel upgrade, but the main reason for that, we were too afraid to do an upgrade, let alone a reboot, because if the server hadn't started, getting to it physically with a new boot CD, would have been a big issue. And that was the single server that the company had at that time, for a long time :)
Why a SpaceMiT and not a Cortus, Codasip, or anything European? (I think there are also other companies also trying to sell their IP that could be more innovative)
CPEU is coming! I love RISC-V and have been following its progress for so long. I hope it gets more and more adoption in the world for desktops and servers. Its already massive in MCU's but we need it everywhere. Open ISA is the best ISA
Google says it's "CPEU most commonly stands for Continuing Professional Education Unit, a credit system used by dietitians and nutrition professionals.". Yeah, not sure how that is related to RISC-V. Perhaps we should eat RISC-V powered nanobots to, uh, future sci-fi something?
Agree, all of them in same industry mostly have similar posters. My eyes keep ignoring them and focus on service quality of barbershop and restaurants.
Is it content-free? I don't think so. Is it hard to read? I don't think so either. Is it incorrect? I hope it's not %))
Does it sound like a typical LLM-generated text? In many areas, it does. But why would I care? This is not expected to be a piece of literary art. Equally, the pictures illustrating it are not artistic masterpieces, and aren't expected to be. And even the letters in the text are not carefully handwritten by a human but machine-generated.
Get used to it, and get past it. It's not worth the attention.
I've been wondering the same since the scandal that hit the French literary world a couple of months ago [0]. Until a journalist (anonymously) accused the author of having written his novel with AI, literary critics and fellow writers were fawning all over the book, and the book was set to grab most of this year's literary prizes.
Then people like you and me, who read AI prose all day long, went and read the book, and we all immediately knew the book was, at the very least, heavily AI-generated. For a few tragicomic months, people were in denial, going on TV to defend his book and defiantly proclaiming that "a machine could not have written this", only exposing their insulated ignorance.
Hence the question: do we dislike this style because we read it all day long? Was it originally pleasing (it probably arose out of RLHF), but then used excessively? All while famous French writers and critics had nothing but the highest praise for the book...
Note: after the author could not prove authorship, his editor officially declared that he had, indeed, used AI to write the book [0].
It's interesting to see that both "Firefly AIBOX-K3" and "Milk-V Jupiter2" use cores from SpacemiT, a Chinese company. It's even listed as the "Reference stack" that is "Defined together, verified together"!
That’s the question I’m asking. Where is Siemens and Bosch these days… all I see is China is playing to get through EU compliance to ensure more phoning home from
Industry 4.0 appliances. Meh.
And no, I’m not American, nor I think Americans can be trusted more these days in the race of global surveillance programs.
But having open, patent free standards is noble. I love the idea.
I think you misunderstood. I’m happy to buy RISC-V computer but from a vendor that I can trust I don’t need to place in DMZ or I see funny traffic on the routers
> European RISC-V Industrial Computing Initiative
> Based in Europe, open worldwide
So European, right?
I'm immediately thinking: there's got to be some sort of sovereign aspect to the initiative ... right?
I mean, if there's one place you want a silicon stack that wasn't manufactured in China, it's most definitely in the guts of your industrial infrastructure (assuming you still have one, yes, point taken).
But, if you look at the "The silicon is here." section and dig a little:
The eProcessor TC1 is a RISC-V CPU with cores designed by Cortus (Mauguio, France) and fabricated in GlobalFoundries Dresden fab (22FDX). But that's a public initiative, not a private one.
Not an expert, but reading the article you linked it seems it was quite stressful?
> EPI demonstrated several results just after the Phase 2 end in 2026.[11] SiPearl demonstrated the Rhea1 chip running a complete HPC software stack. The system booted on a test board, with a standard Linux distribution running with high-speed HBM memories and their associated hardware performance monitoring counters. It successfully executed the HPL and STREAM benchmarks, demonstrating the readiness of the complete Rhea1 hardware and software ecosystem for HPC workloads to power Exascale systems. Rhea1 features 80 arm® Neoverse V1 cores, more than 61 billion transistors (7.8 billion equivalent gates), built-in High Bandwidth Memory, with 4 stacks of HBM, 4 DDR5 interfaces supporting 2 DIMMs Per Channel, and 104 lanes of PCIe Gen5 interface: up to 6 x 16 lanes + 2 x 4 lanes. Rhea1 was selected for implementation in Jupiter, Europe’s first exascale supercomputer. The next version, Rhea2, was selected for implementation in Alice Recoque, the second European exascale supercomputer.
And then more paragraphs how work was taken forward..
This cultish nonsense is one reason I've stopped taking RISC-V seriously for desktop/server usage. There are other reasons too:
- RISC-V is "open", except in none of the ways that matter to me. What I want is a well-documented platform able to run fully open software. RISC-V does not inherently provide the former and the latter has nothing to do with ISA. If anything, manufacturers seem to take GPL-licensed software, modify it then _not_ publish the modified source code.
- Lately I've started to care a lot more about minimal software stacks that are easier to prove to work as intended. Part of that includes generating raw machine code and I hate the terrible immediate encoding especially for C instructions. Compare with x86-64 where you can just write the constant straight to memory. x86-64 would actually be a nice ISA if it were not for prefixes + lack of explicit instruction length.
- It seems there is an excessive focus on hardware "simplicity" (for very small cores) while neglecting simplicity on the software side. I would benefit greatly from automatic bounds checks, checked arithmetic... and many "safe" languages would too. This "simplicity" apparently is also why the immediate encoding is so ridiculous.
Is it though? AI can rapidly push through an objectively better standard if a group becomes motivated to make one. There’s no need to marry ourselves permanently to a mediocre design like we did with C interop.
By some coincidence RISC-V became successful just before/while AI took off, and I'm glad it did. The design is pretty good for low end cores and probably good enough for high end cores, so there's a chance it will become one of the dominant ISAs in the mid-term.
We're probably getting to a point where AIs will just generate optimized binaries directly, so I'd rather have them generate them in a machine language that is human friendly. RISC-V being designed by humans with a focus on simplicity is close to the best we could wish for.
It makes sense for the Chinese to make Loongson be performant, its an ISA they fully control and only have to do with domestic Loongson standard body politics instead of having to deal with global Politics in the RISC-V standard bodies.
So it's late to deliver hugely complex cores according to some optimistic timeline? That's a weird measure of success. The ISA is successful in the low end and is seeing huge investment on large cores, though most of the promising companies are now focusing on AI or getting bought by large players like Qualcomm. So yeah it might take a while still before we see competitive high end consumer cores. I would still put my money on RISC-V rather than Loongson for the long term but we'll see.
It's a far better measure than "despite all the years of unfulfilled hype and promises we'll absolutely have a smorgasbord of performant RISC-V cores Real Soon Now". Single core performance down in the Intel Core range? Needs 96 cores to even be competitive on a handful of benchmarks that don't equal a modern users compute needs? The competition isn't sitting on their hands, and RISC-V hasn't delivered the performance it's fanbois have told us is 'inevitable'. Loongson has at least managed late-2010s levels of performance.
Maybe RISC-V will completely take over the embedded market. That's not a bad gig. High volume, tho slim margins, lot's of niches for lots of innovation (want to continue to go crazy with ISA extension? Not a big deal in the embedded world). But they're still selling billions of 8051s, ARM is ubiquitous but even they didn't take over that world, and I know how I would lay my bets there, too.
About ERICI
ERICI is a non-commercial initiative in its founding phase. It is not yet a legal entity, sells nothing and charges no fees.
(https://erici.eu/impressum.html)
The random dude is not looking for funding.
it means not intended with the purpose to make money from it
founding doesn't always imply. a startup-like process of selling stock (or similar) to investors which in turn want some profit from it long term
it can also mean looking for donations to found a project, i.e. cover it's costs
I hope that leading European industrial computer manufacturers notice the initiative and join -- or at least start evaluating the possibility to use RVA23 SoCs in their devices. Yes, currently only Chinese vendors can provide such chips, but the world is changing fast.
Great idea, but if the important EU players aren't there, what's the point?
I just purchased a boatload of Chinese RISC-V development boards for about $2.30 a piece. Can't wait to start playing with them.
"RISC(-V) architecture is going to change everything."
[1]: https://www.aliexpress.com/item/1005011967676963.html
8k RAM, 64k ROM, compressed RISC-V insn set.
Edit: Apparently it's a QingKe RISC-V with about 130 Coremark.
What's important in the context of a European "sovereign computing" initiative is the licensing of the instruction set architecture. Like x86, ARM is still proprietary, while RISC-V is a free and open standard.
Saudi Arabia did recently invest 45 billion dollars in the vision fund which is an investment fund managed by Softbank but they haven't really invested within Softbank itself so not it is not mostly owned by Saudis from what the data can tell.
Even though it's Japanese-owned most of their R&D still takes place in England.
I know that sometimes "European" is used as a synonym for "in the EU", but most of the time this is sloppy. Nobody in Europe thinks UK is "not European".
RISC-V is IP UNlocked. I bought RISC-V mini-boards (so cheap) years ago because I was planning to build my keyboard... but I am still on other projects... and there are even better RISC-V miniboard nowdays (better USB, more GPIOs... for a full fledge BFO-9000 keyboard!).
What I am waiting for are RISC-V high performance micro-architectures which will use the best silicon node (desktop, mobile, and for servers it seems there are a few attempts). One of the main issue seems... the compressed instructions which should be removed as it increases implementation complexity significantly in order to apply some of the known high-performance optimizations (it is not anectodale if ARM removed thumb machine instructions).
I like the idea, I code as much as possible things in RISC-V assembly now, and re-use a ton of code paths (at the assembly level!). I have even written a small RISC-V interpreter for x86_64 for static exes.
All they want is to suck on the government's tit.
This is like comparing an 48MHz ARM-Cortex-M0 with the CPU in your Macbook. Yes both of them are ARM cores, but the small embedded processor has very little RAM/Flash/clockspeed, no memory management unit, no cache, no modern RAM interface.
Not even the instruction set is really the same, because you (typically) won't even have floating point instructions/registers on the small MCUs, much less vector instructions.
The Milk-V Jupiter 2 mentioned in the post is basically a full-fledged Desktop CPU and it's price is not gonna be anywhere close to $2 either...
> A machine that runs for 15 years needs software that can be maintained for 15 years.
I don't quite understand. Has this been a problem for industrial machines? Can't they already run for 30 years and more?
What exactly is this initiative looking to fix and improve? Besides of the basic idea of FOSS being good, and whatever.
The industry can barely keep an npm update from breaking the world now.. and that’s build tools and environments and so it’s independent of “we use stable languages”
Now add the possibility of political sanctions on ISA licensing and you have -
Hardware that’s fails quicker and may not be available to buy, software that barely builds months later, and a world where the US president can sanction entities at will if they don’t comply…
Yeah, open source isn’t all that’s required
I know uptimes were a flex back in the day but now a long uptime is an indicator that maybe you’re treating your machine as a pet instead of cattle.
Does it sound like a typical LLM-generated text? In many areas, it does. But why would I care? This is not expected to be a piece of literary art. Equally, the pictures illustrating it are not artistic masterpieces, and aren't expected to be. And even the letters in the text are not carefully handwritten by a human but machine-generated.
Get used to it, and get past it. It's not worth the attention.
"RVA23 silicon has arrived. The industrial computer built on it has not."
"Until recently it lacked what industrial systems need. That has changed."
So tiresome...
"An industrial computer has to do more: survive the control cabinet, talk to the field, and stay available for a decade or longer."
Do people think this sounds good?
And what if it does, but you and I are just tired from seeing it everywhere?
Then people like you and me, who read AI prose all day long, went and read the book, and we all immediately knew the book was, at the very least, heavily AI-generated. For a few tragicomic months, people were in denial, going on TV to defend his book and defiantly proclaiming that "a machine could not have written this", only exposing their insulated ignorance.
Hence the question: do we dislike this style because we read it all day long? Was it originally pleasing (it probably arose out of RLHF), but then used excessively? All while famous French writers and critics had nothing but the highest praise for the book...
Note: after the author could not prove authorship, his editor officially declared that he had, indeed, used AI to write the book [0].
[0] https://www.msn.com/en-us/technology/artificial-intelligence...
So.. it's a bit funny to read there is an European Initiative... to promote Chinese computer appliances.
In times when fridges with Chinese electronics that are phoning home become more hack-able today than ever..
In fact several countries do support Huawei store in addition to Apple and Google ones, including having the usual bank apps available there.
https://consumer.huawei.com/pt/offer
https://consumer.huawei.com/pt/campanhas/appgallery
As others ITT have pointed out, this is a vibecoded site from one guy lol
https://news.ycombinator.com/item?id=50349860
> Hardware
> RVA23 SoC with IOMMU
> SpacemiT K3
> 8× X100 cores, hypervisor extension, IOMMU
And no, I’m not American, nor I think Americans can be trusted more these days in the race of global surveillance programs.
But having open, patent free standards is noble. I love the idea.
So European, right?
I'm immediately thinking: there's got to be some sort of sovereign aspect to the initiative ... right?
I mean, if there's one place you want a silicon stack that wasn't manufactured in China, it's most definitely in the guts of your industrial infrastructure (assuming you still have one, yes, point taken).
But, if you look at the "The silicon is here." section and dig a little:
> "Shenzhen MilkV Technology Co., Ltd" [1]
[1]: https://milkv.io/about
Wake me up when someone can actually build a computer from scratch with EU-made parts.
What would it take to make this possible, if not completely then at least move in the right direction?
Aside from re-thinking computer manufacturing from the ground up.. RISC-V, or something like it, seems like the right idea as part of the solution.
That may be a high bar. Would all countries in the world collaborating, except for China, Taiwan and South Korea, even be able to do this?
https://en.wikipedia.org/wiki/European_Processor_Initiative
> EPI demonstrated several results just after the Phase 2 end in 2026.[11] SiPearl demonstrated the Rhea1 chip running a complete HPC software stack. The system booted on a test board, with a standard Linux distribution running with high-speed HBM memories and their associated hardware performance monitoring counters. It successfully executed the HPL and STREAM benchmarks, demonstrating the readiness of the complete Rhea1 hardware and software ecosystem for HPC workloads to power Exascale systems. Rhea1 features 80 arm® Neoverse V1 cores, more than 61 billion transistors (7.8 billion equivalent gates), built-in High Bandwidth Memory, with 4 stacks of HBM, 4 DDR5 interfaces supporting 2 DIMMs Per Channel, and 104 lanes of PCIe Gen5 interface: up to 6 x 16 lanes + 2 x 4 lanes. Rhea1 was selected for implementation in Jupiter, Europe’s first exascale supercomputer. The next version, Rhea2, was selected for implementation in Alice Recoque, the second European exascale supercomputer.
And then more paragraphs how work was taken forward..
- RISC-V is "open", except in none of the ways that matter to me. What I want is a well-documented platform able to run fully open software. RISC-V does not inherently provide the former and the latter has nothing to do with ISA. If anything, manufacturers seem to take GPL-licensed software, modify it then _not_ publish the modified source code.
- Lately I've started to care a lot more about minimal software stacks that are easier to prove to work as intended. Part of that includes generating raw machine code and I hate the terrible immediate encoding especially for C instructions. Compare with x86-64 where you can just write the constant straight to memory. x86-64 would actually be a nice ISA if it were not for prefixes + lack of explicit instruction length.
- It seems there is an excessive focus on hardware "simplicity" (for very small cores) while neglecting simplicity on the software side. I would benefit greatly from automatic bounds checks, checked arithmetic... and many "safe" languages would too. This "simplicity" apparently is also why the immediate encoding is so ridiculous.
We're probably getting to a point where AIs will just generate optimized binaries directly, so I'd rather have them generate them in a machine language that is human friendly. RISC-V being designed by humans with a focus on simplicity is close to the best we could wish for.
The telling thing is in benchmarks the Loongson outperforms them, by a lot.
It's a far better measure than "despite all the years of unfulfilled hype and promises we'll absolutely have a smorgasbord of performant RISC-V cores Real Soon Now". Single core performance down in the Intel Core range? Needs 96 cores to even be competitive on a handful of benchmarks that don't equal a modern users compute needs? The competition isn't sitting on their hands, and RISC-V hasn't delivered the performance it's fanbois have told us is 'inevitable'. Loongson has at least managed late-2010s levels of performance.
Maybe RISC-V will completely take over the embedded market. That's not a bad gig. High volume, tho slim margins, lot's of niches for lots of innovation (want to continue to go crazy with ISA extension? Not a big deal in the embedded world). But they're still selling billions of 8051s, ARM is ubiquitous but even they didn't take over that world, and I know how I would lay my bets there, too.
At some point we have to accept it isn’t happening.