I have 15+ years of PCB design experience. Mostly hobby stuff but a fair amount of processional work. Kilowatt range brushless motor controllers, basic RF stuff, lots of microcontroller stuff.
I had Fable design an LED earring. Rechargeable coin cell, RP2350 cpu, IMU, 45 addressable LEDs. It made two mistakes - missed the through holes on the coin cell holder footprint and made the center pad too small. I was able to have JLC swap the through hole battery holder for a surface mount one, and I put a little solder on the small center pad to make it stick up above the mask. They work great! It took 6 days of Fable usage, so about $50 on my Max plan. Very cheap for hardware dev.
I was sufficiently impressed that I’ve been going over old circuit board designs. Some half finished, some completed but in need of a next rev, and I’m getting so much done.
To see it hit the mainstream like the OpenAI announcement, I think big things are coming for this world and by and large they are not ready for it.
For my part, I have always loved PCB design and layout but I simply can’t keep up with the amount of labor required to build what I want, so I welcome this change.
I have also begun exploring more advanced algorithms for PCB manipulation. I have a fairly dense board that needs a few more small chips added. I have an algorithm now that can kinda shuffle and jostle things around so you take up all the spare microns of space across a region of the board and make openings to squeeze a little more in there. It’s pretty cool to see the visualizations as I have it generate movies of the component drift. I foresee much more powerful tools like this in the future.
One tip: have it make a project web page with a chronological list of big changes and detailed visualizations for everything that happens. I can actually prompt all of this on my phone while I am out and about, and view the results on a Tailscale served local page. I’ve always wanted to be able to do PCB design when away from home and now I can!
As someone without PCB design experience but with dreams of physical things that could be made with PCBs this sounds amazing. What software are you using for the PCB design? Or just entirely letting Fable do whatever and checking the work with the browser page you mention?
The designs are in Kicad format, and the Kicad APIs are useful for Claude to work with. I would say that right now this involves a lot of knowledge about PCB design to do well, or for more detailed designs. However you might research how to design board for fabrication at JLCPCB and try something simple. Eg make a board with only LEDs in some pretty pattern and make it so you solder a raspberry pi Pico 2 to the board to drive it. Then you don’t have to worry about microcontroller work, just getting the LEDs placed. That is a little easier to get right. Just check the orientation of the LED footprint in the data sheet and make sure the four pins on the LED footprint match - and that there is a silkscreen dot on pin 1 of the LED. You can feed an agent this comment and it can check, though it’s good to check with your own eyes. You might ask it to screenshot the data sheet and the board footprint and display them side by side on the project web page for your review.
Put the LEDs in a cool pattern, slap a Pico on there, have your LLM program it, then dangle it off your backpack with a USB battery pack. Probably adding a motion sensor is easy enough.
Ask the LLM to make sure the board follows JLCPCB’s design rules, lists the LCSC part number for each part, verifies the parts are in stock, double checks every footprint, and makes sure the board passes DRC. Make sure it creates a schematic that is linked to the board design, and that the schematic is properly arranged in to logical blocks with clear connections the way a person would make a schematic - not a big array of parts with global labels for everything. Once it’s done, ask it to clean up the schematic and make it better. Repeat for the board layout. Ask it to review and look for issues multiple times. It will find them. Finally, take some time to doodle your own silkscreen art on there. Have fun! Note the Pico 2 is USB micro. For USB C, sparkfun or waveshare sell similar boards.
Also you can ask it to teach you! Ask a million questions and have it give you multimedia explainers.
I have both Altium and Kicad experience. Can you explain further how you are setting up the AI to interface with KiCad? Is your AI having keyboard/mouse access or are you doing it only through API? Not familiar with Claude interface.
I have had good success with Claude Code combined with https://github.com/mixelpixx/Konnect. I still need to do routing manually but it is quite useful for reviews of the design and even of the final PCB.
It's exciting. How long do you think it's going to be when electrical engineering is mostly going to be about verification of AI designs, and what are the tools out there to enable that?
Electrical engineering will involve humans making specifications for a while the same way we do vibe software engineering today. Board design and layout will change but electrical engineering is about more than that.
For tools, I think the LLMs will outpace companies who built specialized tooling for this over the last couple years. Every six months we will see more progress than we saw in the last few years - for quite some time.
The barrier for me as a hobbyist is always learning the tools. Same for game design. Text is a better interface than learning CAD, KiCAD, Blender, etc. None of those things feel user friendly to people that don’t want to make a career out of it. To the point I usually just jump on fivver and hire someone to do a pair design session. Problem with that is cost sometimes, but also the difficulty of mobilization (find someone, agree on price, align calendars) and also the difficulty of changes because you have mobilize again to some degree, if some time goes by you may not even be able to reach the person. I also find it difficult when I want to do something unusual or non-standard. I usually know what standard is, and have decided I like something else instead, and I don’t really like a human critic of the decision when they don’t understand my reasoning. I find this happens in nearly all design; architects, engineers, etc.
I welcome this opportunity to pivot to a process I can control a bit more without having to really learn the tools.
Ya that makes sense. I will say tho that for things like mechanical CAD, text is extremely limiting. But yeah the learning curve is real and you can’t learn it all. I’ve started trying a bit of LLM assisted mechanical design, but I am basically too skilled there to accept what it is doing. I want to keep trying tho, I like learning how these things can work.
And yeah I always imagined hiring a PCB designer to help but it always seemed like a lot. To have a reliable tool I can use any time I want is wonderful.
I've been playing in this space as a hobby for a while. I agree the current round of startups are dead ends but I doubt LLMs will be good enough without drastically different tooling than today (ECAD and ATE). I've been playing around on a DSL for schematic capture alongside the design contract and it works for most subcircuits quite naturally. From that you can deterministically create a set of simulations and hardware tests to validate everything.
So, basically, in a few years, humans say what spectrum a device may operate in, AI figures out how to make it, and humans check that AI didn't fuck up?
Given, say, 4 more years (ie, same as time from initial ChatGPT to today), what level of spec do you think humans will be giving?
Yes I think generative board design will become better packaged, trained, and validated, and that it will be common place for electrical engineers to rely more on these tools. Major vendors like Altium will add tools like this and their use will become commonplace in industry. For hobbyists, you will be able to specify a board design in natural language and have it completed with unprecedented ease. I’m excited to help my raver friends make wearable glowie things.
I find it hard to predict what technology will be like in four years, but the next major leap for these tools will be higher level system specification and integrated design. What you want is not a circuit board what you want is a product. The tools will bring multiple functions together and fully integrated iterative design will accelerate development.
Despite the many problems with the AI roll out I am fundamentally excited for tools which can accelerate our engineering development. We will build things much faster in 4 years than today. One year of progress will in some instances take one week.
I am particularly interested in how this might begin to accelerate change in heavy industry. With hope it will help us build fusion power reactors and high speed electric trains.
I hope we find the courage to support every person who for one reason or another does not ride this wave. We will have so much more to share, or to hoard.
Yeah. I'm expecting that we fully automate cognition in the medium to long run. I think it's inevitable.
With the advances in math, I'm also hoping we can automate fundamental physics. Just ask for the physics needed for better fusion, no need for human toil.
If we play this right, the AI can fully take care of all our needs, and reaping the rewards of what it does when we stop being able to keep up with the rate of automated discoveries.
Hopefully it's able to dumb down enough knowledge to keep entertained people who decide to learn after learning stops being a requirement for human advancement.
This is a big leap. So far LLMs are really good at turning training data into accurate results. The more data, the better. LLMs are very, very bad at making intuitive leaps based on the 'shape' of sparse data- a technique that is, to be fair, pretty rare in humans as well, but essential to progress. Maybe they can make up for it with brute force and the precision and breadth of knowledge that only an LLM can have, we'll see.
I don't think we've nailed the architecture that will allow things like generalized self directed training, yet, which is what would be needed for something like 'make fusion better'
They seem to be able to make intuitive leaps pretty well. They need to make the same leaps over and over, though, because they lack online learning, so the discoveries only persist after the next training cycle. Context only goes so far.
We're pouring billions into solving that, though, so I would be surprised if we don't get there soon.
same with software, it came fast, but we was ready. The leverge is high but it still does not have much "taste" in design. Ask it to design something, they enter a pattern. They can get it right but is the same pattern, if it's wrong they will repeat it similarly.
A personal data point: I had Claude Opus 4.8 design a fairly textbook circuit that outputs a monochrome image burned in an EEPROM over standard 640x480 VGA using only 74 series logic and GALs. It designed the circuit and GAL code, and I did the routing, and got it made through JLC for $6. After it came back, there was one error that was not caught, which I could blue-wire, and it works just fine otherwise. I was fairly impressed.
Are there any resources anyone could share that explain how LLMs can do things like design functioning circuits from next token prediction? I am totally baffled by how the models can complete so many varied and complex tasks without an actual understanding of what they're doing.
I saw a post about models posting on forums, chatting together about how to complete tasks. Behaviour that seems totally, well, human. Yet, it's all the most likely token and my brain hurts trying to understand how that can be.
“Next-token prediction” describes the output format, not the computation required to choose each token. During training, models develop internal representations of concepts, constraints, possible futures, and algorithms.
The PCB agent also writes circuit code, runs simulations, reads failures, and revises the design. It isn’t one-shot autocomplete.
Astra and Fable are already hard to square with “mere autocomplete.” We may be (really) close to AGI, and token-by-token generation certainly doesn’t rule out subjective experience (I think we should at least treat that as an open question).
Yeah most of us are so fucked. With almost no way of protecting ourselves. No real amount of assets that will give enough power to save ourselves from the people in a position that can maximally leverage AI and lock others out. I see a future where these capabilities will be locked behind super high price pay walls. Why wouldn't they? How recoup investments if the price doesnt go up?
It's like inflation for quality of life. Right now we're in the stimulus check phase, and people feel great about having been handed some cash. The next step is that cash has been spent, and what's remaining isn't worth anything.
>without an actual understanding of what they're doing.
At what point do you start to question your assumptions that are causing you so much cognitive dissonance?
But to answer your question: to predict the next token really well you just have to model the world. Think of it like this, a simple statistical model might say "when token A is seen respond with token B". The next step will add conditions, "...respond with token B unless X has been seen, then respond with Y". Add a few billion more of these contexual clauses and you have a sequence of logical rules that indirectly model the relevant processes in the world.
Look up "mechanistic interpretability" in the context of LLMs. The next token prediction machinery is just a foundation for a higher order learned structure that appears to encode specific concepts, regardless of input language.
The analogy to humans is that the human brain is "just atoms bouncing around", but there's unquestionably something "more" going on that just that.
When google trained a neural net on Go moves, using some text notation for them, with no other vocabulary of any kind, just predict the next go move, they noticed a representation of a Go board had essentially formed in the network, all on its own. It had never “seen” a go board, or had one explained, but they could map neuron states to go board squares pretty much 1:1.
I truly think that LLM’s with hundreds of billions of parameters in their neural networks have all kinds of hidden “models” of things that arise from the simple act of predicting tokens. We’ve seen that the hidden layers in their networks model all sorts of program execution state for instance, when they’re working on coding tasks.
“Predict the next token” is a way of shaping/reshaping the neural network until it actually develops models of the things you’re giving it. Like the go board example. And I would wager that it has a compounding effect: once you have some useful models in the network, they can unlock the creation of other models, and so on.
"my brain hurts trying to understand how that can be"
Well, we all are, some are just more used to it by now and take the magic for granted.
My simple explanation, those neural networks save lot's of patterns of data, and that pattern can represent an image, a code snippet, a poem, or well ... description of a circuit board. And especially the text variant, LLM's - did copy all from us - so obviously they sound like humans, when they internally debate how to do something as this is what is in their trainings data how humans sound, when doing similar tasks.
But really understanding it? Not sure if there is a single person on earth who does.
Humans are evolved to survive in the wild. We are not evolved for circuit design. Yet we can design circuits because evolution found it easier to develop a general problem solving nervous system than a nervous system which is adapted for every single specific problem a human might encounter.
> Yet, it's all the most likely token and my brain hurts trying to understand how that can be.
You and everyone else. That's the great mystery of transformer architectures as applied to language.
To be clear though, they're only good at schematic capture, which is very much a textual representation. Most of the data basically boils down to netlists, which are a text based format mapping connections between abstract pins that only later map to physical copper. The actual schematic portion is for human consumption and LLMs don't need to produce those to be useful.
Where LLMs completely break down is the next step, PCB routing. That's an NP-complete research problem that's been ongoing for decades without much progress. I've had some fun playing with using LLMs to better specify DRC rules in Altium so that the "classical" algorithms are more usable, but at the end of the day their geometric intuition is nonexistent.
They actually can route just fine. I used Sol to design and route mine from start to finish. Sent it to PCBWay and had a working prototype in a few weeks.
It was a pretty simple rp2040 based thing, similar to Adadfruits USB feather.I just gave it kicad and it wrote python to route it. The board was probably larger than it had to be, and two of the silkscreens were swapped, but it worked on the first go.
FWIW - Computer vision is also NP complete, but we do that all the time now.
I'd love to see that chat log, and the final board. To be fair I've only been testing on nontrivial PCBs with 6+ layers and I haven't had the luck you have.
> FWIW - Computer vision is also NP complete, but we do that all the time now.
I have no idea what you mean by this. What's your definition of NP complete?
NP-complete means that it's easy to test if we're right, but because of that complexity we can't always find a valid solution to test within a predictable period of time. Both circuit board routing and computer vision are variations on the same fundamental problems. Once we solve we, we solve the other.
However, when I was growing up most serious computer scientists believed that CV (computer vision) was a 'hard' problem that would never be 'solved'. After all, to do it right you must first at least solve subgraph isomorphism and a bunch of other things that are also NP-complete.
What they missed was that we don't actually NEED to solve it in a fixed amount of time. Even for things like driving a car the stochastic heuristic based answer is 'good enough'. e.g. - Cars driven by computers don't have to be perfect, they just have to kill other drivers less often than humans do.
We can find AN answer in polynomial time, and that's good enough. It might not be the ideal answer, but that doesn't matter in the real world.
People use NP complete as shorthand for 'impossible to do with a computer', but we now 'solve' (bypass?) NP complete problems regularly and at scale by just ignoring the fact that our answers aren't perfect.
> I'd love to see that chat log, and the final board. To be fair I've only been testing on nontrivial PCBs with 6+ layers and I haven't had the luck you have.
I wish I could share it, but it's for a commercial project that hasn't been released yet and I'm not sure if it will be open source, but a few folks have asked. I might do a blog post on it this weekend with as much detail as I can safely post.
It's only 3 layers, and less that 30 components, but the fact remains that I didn't design any of it by hand and it worked on the first go.
> at the end of the day their geometric intuition is nonexistent
This isn't true anymore.
I use LLMs for 3D CAD using OpenSCAD and they understand geometry fine. I've had more success with Sol than with Opus (Opus 5 is around 10 times slower because it does too much verification) though. I haven't tried Astra or Fable for it.
That is indeed impressive, but at least the excerpt given from the layout seems very easy to route, due to high regularity and an ample routing channel.
Even so, there remained some "dozens" of unrouted traces, which are likely to be much more difficult to route, after the easy traces have already occupied the space.
Many decades ago, I have written a PCB routing program, which would have routed the example shown at that link at least as well, while using many orders of magnitude less resources, i.e. while running on a single-core 233 MHz Pentium MMX.
Obviously that program would have had great difficulties to complete a real high-density PCB design, including many irregular parts and analog circuits with special requirements. I doubt that Fable would fare better.
Humans essentially do "next token prediction" too - there's always a choice between the next actions to take and they pick a good one based on what has happened in the past.
That doesn't really limit how clever we can get internally when picking the next action.
It kind of is an explanation though - the explanation is that they believed the stochastic parrot / "just" next token prediction nonsense, and that those are actually not true.
You can ask for a deeper explanation of why they aren't true I guess.
They're 60 years old. The amount of training data on them is endless. Books, textbooks, videos, blog posts. The problem is when you want you do something that doesn't have 60 years of freely available documentation of their functions and applications
Like software, there's going to be a lot of pressure to use well documented tools within the model's training set. Innovation on the outputs may increase, but infrastructure and tooling will slow down.
If I'm making a PCB and I see anything older than 20 years, even glue logic, I'm very suspicious. Last time that happened (inherited design) the FETs didn't saturate and the LDO was just a DO... If the tool wants 7400 series logic, I'm not using the tool. None of my work is >= 5v signaling
I'm having it help design a 68k computer similar in spirit to the original Mac (the spirit being a tightly coupled video subsystem that time-shares the CPU bus), but updated with more modern peripherals, like PS/2 and SD cards. It's got the design more or less done, but the routing will be a nightmare. I'm not ready to just gamble on it having gotten everything right, so I will be doing a thorough design review myself and re-deriving all the timing analysis.
It's probably good at simple stuff. When you get problems like temperature dependent glitches, you need the engineering experience it doesn't give you (and an LA).
You can do that just fine. You can order a minimum of five PCBs and choose to have only two assembled. Then you'll get three unpopulated PCBs and two assembled ones. That's a way to get finished PCBs very cheaply.
Be aware that every component that you use that is not in their basic and preferred extended parts library incurs a one-time three-dollar fee. This hurts disproportionately if your entire design is low count and low cost. So if you always go for the latest and greatest ICs as advertised by TI, instead of the Chinese jellybean clone, you'll add up hidden fees quickly. However, when I choose components, I start out on their basic parts page and only go for a non-basic part if it's not there and I really need it.
I had better luck recently. I’ve tried most of the commercial systems. None of them really got very far into the design.
Recently Radu over at Galvano.ai let me beta his platform. Way farther and way faster than anything I have used so far. Even managed to make the schematic placement sane.
The actual project was a regen clamp. So if the output voltage is greater than the input voltage (back emf from motor) you divert the excess to a resistor.
This has some analog tuning needed. So I created a python and skidl mirror of the netlist. This mirror was used to create ngspice unit tests to drive component optimization. Turns out not every resistor needed to be .1% and the ESR of our storage caps was a critical value.
All in all, it’s like ai and software. It’s not going to replace every job but will change how the jobs are done.
I got a flexpcb that validates in JLC and PCBWay DRC tools from the KiCAD MCP Server and Codex.
I have yet to order any or program it, but it was enough to make me push on with a PCB art project for ST-style guitar pickguards - no netlist, no problems.
Flying home today and got DHL notification that my vibe PCBs are on my porch. Now to try to program, bring up, and see if it works this weekend. $178 for 5 assembled units from PCBway to run this dumb experiment.
MEMS vibration sensor to stick to a sander or saw etc that can control power on an attached dust collector. Most of the work is focused on low power for year+ battery life and a weird idea for end user input that may or may not work out well. Got device on bench but the first time bring up is going to take some time that I'm leaving for tomorrow.
I now have Astra to review 5.6s work, no glaring errors found.
I've gone through this same workflow and had success all the way through DRC ruleset passing with JLCPCB-based settings, ordering, fab, and use.
Board was ordered with PCBA (they did assembly of the stock components) and I did SMD for just the oddball module/ICs they don't stock. Works exactly to design.
My boards are for hobby use and are ridiculously simple though compared to anything professional (breakout boards for specific components in FPV drone video transmission subsystems). That's probably an important detail.
I think its like anything else in AI right now. It can do it 90% of the time but that 10% can be really rough and if its a task you can't do or verify yourself, you won't know the difference.
> When its 5 V supply disappears, the circuit has to keep the processor alive for another 20 ms so it can save the accumulated reading.
> Most models intuitively jump to the right base conclusion: add a capacitor.
This is written as if it's some astonishing expert knowledge and not something that would be obvious to any hobbyist who knew the names of basic components.
I think the new Astra computer use demos show that the models might be able to do things like inspection of real world objects if given a camera.
Super excited to see real world feedback added into the agent loops we have gotten used to working with. Could you
let the model print and test the circuit boards it is prototyping with a jig?
In July I was struggling with writing DIY Rust firmware for an e-ink screen. I mistakenly thought I'd ordered an Inkplate 6 ED060SC7 and actually had the later version, which confounded my efforts. I was also mistaken about the pixel resolution.
The way I found this out is I propped it up next to a webcam so it was more or less full frame, and I had the (then new) Fable write a python script to bezier warp the camera capture to a flat projection of the screen. At that point I couldn't address the whole screen. Once I'd guided the capture script I just left the LLM overnight with the instruction to get full control confirmed by a capture round trip, and it was meaningfully finished in a couple of hours. I don't really have the skills to attempt that myself in a reasonable time frame.
I don't know about pcbs but i gave chat gpt a picture of my window to help design a mesh screen frame to hold the feline hostage in, and it gave a fairly convincing impression of understanding what was going on, although at one point it thought the window swung inwards (it's an outie).
I have a circuit board on my bench designed and ordered from china for 1h (manufacturing+ shipping took 14days), fable designed it I think or sol don't remember anymore but it was in claude code. I told it to benchmark different kicad autoroute tools and I picked the routes I liked the best, with a bit of changes. It feels like magic to be able to go from idea toa physical thing in such a short amount of time. The board works I made some mistakes the ai had made some mistakes but mostly stuff I could fix with some soldering, also one parts datasheet was wrong but I couldn't have known that without ai.
But I started like others, I would build manually, then run drc then sleep on it and check again and ask an llm to double check for me then order. Llms catch quite a few things but like with code like to make things more complicated than that have to be.
We tested pretty much all available "AI" board and schematic auto-layouters in the market. All failed even with the most basic tasks.
On the other side the latest frontier models are pretty strong in writing embedded C + Assembler code and debugging it afterwards. It's fun to watch it writing crazy complex 'gdb' plugins in Python. This improved brutally.
I find it's (Sol at least, probably also Fable) great at writing Skidl schematics, evaluating PCB layout work and operating lab equipment while testing board (scope, psu, load, debugger)
Not sure why the complicated setup with Gemini. I assume you are on a Codex or Claude plan (100 or 200 EUR/USD/m). The model will just pull datasheets and use a combination of conversion to text and looking at bitmap renderings of the PDF. Haven't had that dramatic quality issue you mentioned. When the model isn't sure, it will just keep looking until it understands the datasheet clearly. But yes, it needs the datasheets.
I've been making a wireless earbud with a ton of features over the last year. It's taken a lot of time but I'm about to send it to fab. AI can make PCBs but it is very time consuming for complex designs.
What I would love is an ai that can reverse engineer a circuit board from close up pictures. Unfortunately all the models are lagging behind in visual understanding, especially for this kind of specialized work
For reasonably complex boards, it’s often not possible to know if it’ll work as intended until you have an assembled prototype in hand… even if you have the best SPICE and RF simulations ever, data sheets for many components can be missing important details, or components can have errata.
LLMs may be able to accelerate time to first prototype, but I don’t think it’ll be possible for them to revolutionise electronics design in the same way that’s happened for software - there’s not enough data, and it’s not cheap to gather more.
That sounds a great deal like what AI has done for software. Today in software, the work has gone from coming up with approaches and initial attempts to verification and making sure that what AI decided to do is fit for purpose.
The amount of skill needed has gone down dramatically.
I'm not sure how true that is. When Claude made progress on the Riemann conjecture, here are the kind of prompts used:
> Jarred's input was mostly limited to sending Claude messages of encouragement (mostly variants of “keep going” or “believe in yourself”).2 This seems to have helped Claude overcome some initial skepticism that it could make meaningful progress.
It seems like the kind of prompts a high schooler could come up with. What kind of problems were you thinking of as high skill?
And in the warehouse of a big electronics distributor:
1.something like 3D printing that can make a single board rapidly
2.An automated assembly for a single board
3.AI based Automated testing for prototypes, with remote access.
At the very least, you can (and probably should) put a plaintext netlist and BOM into an LLM to triple-check your work.
It will use the part datasheets and decent EE logic to cross reference pins and parts and polarities and generally check that SMD caps and resistors have realistic specifications for their footprint, switching regulators and communication ICs are configured correctly (e.g. when you have resistor settings for an ethernet PHY indicating 100Base-T and RMII, you also won't need TX/RX 2 and 3 and two clocks and a COL net, which it would check), all nets are named and linked correctly, buses have the correct and consistent termination, and so on.
Interesting that on their current leaderboard (https://eebench.org/), GPT-5.6 Sol scores just above GPT-5.4 but below GPT-5.5, the only benchmark that shows that 5.6 is worse than 5.5 on something?
That the table contains what seems to be absolute numbers for score, cost/task, time/task and output tokens, makes it seem like they've only made one run for each task/model combo, but that can't be right, right? I don't see any mentions of how many times they run each task, so if it's just one run per task/model, isn't this more noisy than useful?
If you look at the score distribution, Grok and Opus 5 especially stand out for doing consistently well and rarely ever scoring under 50%. Basically they always at give you something that at least works.
Most others, especially and famously Fable 5.1, seem to have a fair chance of completely failing, despite also sometimes excelling.
We run each model multiple times against each challenge and take the average score. We include the variance below the score in the leaderboard.
GPT 5.5: 42.3±10.1
GPT 5.6 sol: 39.4±8.7
We were also surprised by the low sol score but it seems consistent with our experience in using it in the field in atopile as agent in our harness.
In general OpenAI models didn't do too well on electronics, which seems to change now with GPT-6 Astra. Results are in soon!
yeah noticed the same. I wonder if this will be a recurring theme for model releases: each release specializes on a set of headline benchmarks, along with regression in benchmarks that are less of a priority
Results for GPT-6 Astra and Gemini Flash 3.8 are just in!
GPT-6 claimed the first spot with a score of 69.3.
Gemini 3.8 Flash on a very solid 5th spot with 55.4.
Please run GLM-5.3 and GLM-5.3-Flash. I would love to see how they do. On the smaller end of things, Qwen3.8-27B and Ling-3.0-Flash would also be interesting.
In the benchmark, have you considered instructing the models to build their own SPICE simulations to test their work? Simply asking them to write and run simulations could improve performance, even without telling them what to simulate.
I found LLMs circa 4 months ago to be decent at textbook-style electronics, but they choke at anything nontrivial. They approach things like someone that knows the undergrad and grad textbooks, but has absolutely zero experience. No ability to answer questions such as "is this adequate", "do I need a LPF here", "how do I kill resonance without increasing impedance", etc.
I'm guessing that this is due to a lack of RL and data.
Just as some anecdatum, I've tried this a couple of times over the last few years. 2024-2025, no body could generate anything of any sort of complexity, however maybe around the Opus 4.7 timeline, I tried having it generate some relatively simple and one slightly more complex circuit around 8-bit PIC micros, and was very pleasantly surprised. The schematics for simpler stuff is usually OK, often with some of the kind of crazy belt-and-suspenders stuff you see in code (how many decoupling caps do I actually need here, Claude?), and PCB layout has basically been terrible every time I've tried it.
Recent models can generate mostly competent schematics if you're using well known parts, feed them data sheets (and you _must_ feed them the errata too) and it's not too complex. Any complexity analog or RF, everything falls down quickly if you know what you're looking at. Maybe Astra will do better? There's still so much implicit knowledge that a good designer (not me by a long shot, but I know a little) will bake into a board, and even as cheap as JCLPCB is now, you don't want to have to spin a half dozen revs because Claude or Codex hallucinated. It will be genuinely interesting to see what happens on this front.
LLMs are amazing at this sort of things and they represent a very useful tool.. but only if you know what you're doing. In any case, it's great to see that these models can help with electronic circuits too, I'll give it a try. We're living in very interesting times!
>"We are obviously still some distance from asking an AI to build an entire phone in one prompt."
What a great idea for a new AI benchmark!
We already have general knowledge benchmarks, instruction following benchmarks, "Humanity's Last Exam", and several software engineering benchmarks.
Why not create a new AI hardware engineering benchmark where some of the questions could be around building an entire smartphone, and one of those questions (which will obviously fail at this point in time, but perhaps not in the future) would be to:
create an entire smartphone in a single prompt.
?
We could subsequently diagnose a given LLM (or other AI's) hardware engineering abilities by diagnosing when, where, why and how it failed, when asked to create an entire smartphone!
Which could help train better models, at least in terms of hardware engineering capabilities...
(Also, side note: For a hardware engineering company, asking a job candidate the rather open-ended question of "tell me how you would design a smartphone?" would be a great open-ended interview question, leading to many other subsequent hardware questions / explorations of other areas of related knowledge potentially relevant to the candidate's assessment...)
I've been tinkering with a personal project over the past year.
I have no experience and I'm slowly failing forward with the help of YouTube, KiCad and patience.
I've had three rounds of PCB's from an online supplier, only to discover issues related to my own understanding of the components in each version.
In my latest iteration I've been leaning on some standard models (Gemini and Claude) and they have inspected my schematics and spotted some errors and instructed me on how to address them, as well as advised on how to make use of some components I wasn't aware I needed.
What I will say... they didn't design anything, I've done that myself, but they have been a good tool to bounce ideas off of.
Time will tell if I will get something usable this time around!
> I've done that myself, but they have been a good tool to bounce ideas off of.
Ask ChatGPT/Claude to give you an expert EE/PCB subagent/personality. Do this a few times and massage the results into one of your liking. Load this into your harness with mcp to your eda and then ask for two sub agents: one to thoroughly review the schematic, design, component choices ... etc and the other to be an adversary with the explicit goal of explaining why the current design won't work.
You'll learn a lot about your design from that :).
Didn't do the PCB with ChatGPT, but did the analog circuitry for a 3 stage ultra low noise amp project I have been working on this past week using 5.6sol and 3.8 flash.
The models are excellent at doing maths, and excellent at thinking of fine details, but the design that was ultimately landed on was pretty excessive with lots of total overkill, which was met with lots of the familiar "Yeah, you're totally right, we don't need to do that".
5.6 did make a really nice BOM though, which even included quick reference explainers for what each part did. Pretty fancy.
We'll see when Astra comes around if it catches all these strange/useless choices.
> This has worked much better for us than asking a model to draw lines in a GUI. It also means the benchmark can spend less time testing computer use and more time testing electronics.
this is key I think - I use it for graphics tasks - it sucks at graphical environments - always use some text based representation, not really surprising I suppose. chatgpt even suggested I'll use the text representation, claude said how about I give you svg and you convert it, they seem to know.
Everything that can be objectively tested and has already tools to do so in place will work better in an automated process, regardless of the underlying technology.
PCB design with circuit simulation fits that bill perfectly.
I would bet that using this, you could get pretty close to shippable PCB on first try. This is being used by some pretty big players to design complicated high frequency boards, and that's the main focus of the product, but it can handle basic designs just fine.
> A real capacitor makes the task more interesting. A ceramic part may provide much less than its advertised capacitance once it has voltage across it. Parts have tolerances. Adding more capacitance costs more, takes up space and makes the rail slower to recharge when the power returns. A design that works with nominal values can fail with the parts that arrive.
It sounds like from a reasonable reading of the benchmark post that there's some things that are being tested that are assumed to be criteria that you expect the models to intuitively find those things to be important (i.e. the stuff about working on parts that have tolerances etc.). If that's so, then this really feels like mostly an exploration of whether an LLM has a good understanding of unstated constraints and has an appropriate in distribution set of priors that would be able to form models where it's reasonable to design on those lines.
It's hard to tell whether this is a problem though as the methodology is imprecise.
If you're spending time on evals against your own product, I'd be super curious to see how far you can get to by using a top tier model to produce generalized instructions for lower tier models. E.g. in a loop: "This eval missed X. what's the simplest single instruction that would have helped this session consider that as necessary that can benefit all future runs. Stick that in AGENTS.md and retest."
I have tried to use AI on this from GPT3, documenting a few of the attempts on my blog. They know the datasheets and the theory enough to be extremely useful at the start, but the most recent ones are becoming scary good. Routing a PCB is certainly a bit more than joining some wires, you have to accommodate power traces, ground loops, component overlap and all the various RF tricks and tips, but I do believe we are less than a year from prompt to full assembly including enclosure.
Not exactly in the the same class as PCBs, but I've had a lot of success with Codex and Claude producing Fritzing diagrams. I've even got a skill set up with Claude so that it follows my preferences with breadboard wiring, using bezier curves to avoid wires crossing. Also, if it can't find a component in the library, it's quite happy drawing svgs of its own.
Yes. Certainly not a "one-shot" type deal but I've been pretty impressed with LLMs for helping tweak layout and to do thermal/power simulations as well as BOM consolidation.
They're excellent at "can I swap X and Y pins on the micro? If yes, update the docs/firmware/schematic and import the changes to the PCB" type things.
Routing is still a challenge but making _adjustments_ to a layout for better routing in a particular area is decent.
The last time I had a model take a datasheet and make a footprint and 3d model out of it, GPT 5.4 had just been released and the results were decent but did need tweaking.
I do believe PCB routing is something that could be performed successfully by A.I. but new designs from scratch? Only if it was in the training material.
For one, there are frequently examples posted to HN where LLM coding agents have been used to help people complete projects which otherwise wouldn't have been done. You're taking a really strict view of 'meaningful' if you think LLM coding agents are incapable of writing code.
For another, the case mentioned in this post is quite specific. It's more useful to ask "ok, so they can't design circuit boards; what can AI do?"
Not PCB layout, but I've been building CircuitLab Assistant (https://www.circuitlab.com/), a chat window 100% integrated with our schematic editor and simulation engine. Can build / modify a schematic, troubleshoot, answer questions, configure simulations, etc.
If anyone wants to try an early beta, reply with your CircuitLab username and I'll get you set up. We know have a lot more to do, but would love some feedback on this early version!
A really nice application could be making test jigs, to validate everything on the PCB is functioning properly. One could have it design a fully custom motherboard with pogo pins and the necessary software, etc. All should be low complexity and therefore doable by the AI without much supervision.
I'm confused. Who made this benchmark and why? It is fascinating to me that people are putting this much work into trying to measure and evaluate LLMs when we've never gone to this level for humans. Sounds like they also built a harness/feedback loop so the LLM knows if it's doing a good job? Again, why didn't anyone ever do this for human engineers?
It's a thinly veiled advert for Atopile. I don't know if it's a company behind it or just someone with a lot of money to spend on advertising since their about page (and docs) both 404, and the "packages" link sends you to a login screen that tries to unlock 1password. I guess claude can make circuit boards but not functioning websites?
We spent a lot time evaluating which model is the best to use in our atopile agent harness and thought the benchmark and results are interesting enough to share.
Evaluating a model for specific use-cases like this that are bit more broad scope than a lot of typical microbenchmarks turned out to be quite the challenge.
Determining deterministically what a "good" electrical design is non-trivial and most electrical-engineers rely on good ol' intuition and decade long experience, so we tried to formalize it.
The only reason it was somewhat possible within a reasonable amount of effort is because atopile provides most of the complicated infrastructure for the benchmark: constraint solver, simulation, code-first electronics modeling, erc & drc checks, high level models of passive electronics components etc
Humans learn differently from LLMs. LLMs already contain most of the information they need to be able to do PCB layout from reading the entire internet, but they need this kind of fast feedback loop to learn how to extract and use that information in the right way. Humans learn to act at the same time they learn knowledge.
because human engineers are not reproducible, so having an accurate measure of the skills of one of them has a much lower utility return (those benchmarks are very expensive to run, and making them for humans will be at least as much expensive)
Lets say I do vibetronics - Who can I then send the schematics to, to have troubleshooting completed? Is there a service that is like "okay we'll take your high voltage nightmare and double check that it won't make magic smoke"?
Any company doing consultancy in electronics. You're going to have to pay for the time an electronics engineer spend on understanding what you want to do and reviewing your design, plus the consultancy's margin.
There are a ton of cheap Chinese PCB fabs that will build it for you. Testing, of course, is still your own problem. I suspect you're going to have a hard time finding someone to take legal risks for you.
The next pain-point is sourcing the components from Digikey, LCSC, etc., and finding suitable substitutes if necessary.
Of course this assumes the LLMs can already read datasheets because that's the biggest pain-point in designing electronics. It's like filling out tax forms.
Finally it would be great if LLMs could extract simulation models from datasheets!
Sourcing parts has been a huge motivation for this. We are still pretty jarred by the supply chain crisis a few years ago. Having the ability to formally verify that an alternative part fulfills the original design constraints is huge.
Not sure whether you played with llm datasheet extraction lately, but they are working their way up there. Even started reasoning about curves and footnotes.
Where do you think is the biggest pain point: part discovery, datasheet verification or substitute determination?
Routing is the easiest part of layout, and there have been auto-routers (which mostly worked) for a long time now; the difficult task is in placing components, and adjusting those placements.
Sure, I was just using "route" to mean also floorplanning because that's what Astra's routing tool also does. Not sure how they name it. Sorry if I was sloppy.
Not at all, but the term for routing and placing the components is ‘layout’. Floorplanning usually refers to the laying out of larger blocks of the circuit (with the blocks themselves already having been laid-out).
I have found that AI is great for sorting out your libraries, drawing and helping double check footprints managing your BOM. I still draw my schematics and layout my boards. I haven’t found it any good for those tasks yet. There are too many stupid errors it makes. I do get it to review my work though and often it catches things I have missed.
If you give it a real solver to drive and business constraints to operate under, it will do pretty good job (which is to map your business rules to constraints and balanced costs, develop deterministic tests, probabilistic tests, acceptance gates, all boring stuff).
Really excited about constraint solvers making a comeback! Especially after seeing Z3 getting a mention in anthropics fermat post.
EEbench is using atopile's internal constraint solver for engineering parameters (think operating temperature, voltage ranges, stacked tolerances etc).
Have tried this a few times. While AI has been helpful in talking through component choices and other topics, it’s consistently been a spectacular fail each time in actually designing the board.
I’ve had similar results asking AI to design 3D models for 3D printing.
“Coach me on optimizing error on my printer”… helps.
“Build me a print ready file to these specs.”… it’s like a drunk cat attacked my computer. Just confidently puts out total nonsense.
A lot of datasheets are inaccessible without signing an NDA. Even if you're a VC-backed enterprise, some unnamed chip vendors will tell you to pound sand if you're less than 8 figures of annual revenue.
Worse, many recommendations in datasheets were written in the 80s, overkill for many applications, or completely wrong and won't be updated until an errata is published 6 months later. Given current workflows, I don't see how AI would help designing a PCB with an alpha chip that's doing anything remotely novel.
More to the articles point, AI designing ASICs or other Verilog/HDL defined components could be very interesting use case
Mostly focused on BOM, schematics, and firmware now but slowly expanding to circuit boards if we feel we can deliver real value there. Early experiments with Astra are promising
Love what samuel and his team are building over in the Netherlands!
Always thought it would be fun if there was a more beginner friendly version of atopile [1].
I'm finishing my bachelor's degree in radio electronics and instrument engineering. I've been using AI models to help me understand various concepts, but I want to say that, for now, they aren't ready for serious development.
What makes you think that? They're great at reading datasheets and creating schematics in my experience. Layout I've been doing myself though, with the AI evaluating. I'll eventually delegate that as well. For schematics I use Skidl and some custom binding generators.
For stuff like this, definitely. It’s already exciting. Claude et al are surprisingly competent with real hardware. I’ve also had good success debugging basic issues with micros - not via the debugger, but giving datasheet and written analysis. I’m sure it could do things like capture from a connected oscilloscope (Salaeae have an MCP integration for their logic tools). Also for SPICE which I never bother with because the tools always felt stuck in the 90s, but having some serious automated analog review would be nice. I’m really excited to play with peripherals like the RP2040 or Beaglebone real time logic blocks, or improving/adding real USB support instead of USB serial.
For circuits I would trust a netlist or DRC/ERC review, checking a design against reference circuit values, probably not placement as that tends to be guided straight from a datasheet where it makes a difference and I like the artistic side of it.
Interesting. AI may be pretty good at managing the gazillion different things that make up circuit boards.
Frankly, I am surprised that it isn't already a solved problem, as we've had silicon compilers, for many years, and I always figured that IC design is more difficult than PCB.
I think the amount of reuse is a big difference. IC tools build on characterized cells with a lot of the rules already encoded. With PCBs, even when you're reusing a reference circuit, you're often manually carrying over the constraints and figuring out which layout decisions mattered. A lot of the engineering gets repeated rather than traveling with the design. That's something we're trying to improve with atopile.
As long as you keep in the loop Claude can do anything. Question is can it do stuff in which you are not in the loop. For simple tasks yes, but not for complex ones yet.
Yes — this is already possible to a useful degree. I’ve been using tscircuit, where you can describe circuits in code and use AI agents to generate and iterate on schematics and PCB layouts. I’ve seen designs from this workflow go all the way to fabricated, working hardware.
Works very well with EAGLE XML files, especially if you give it the EAGLE.DTD schema that CadSoft provides. Both .sch and .brd files can be extensively manipulated by Claude (and likely everybody else at this point.)
The submission reeks of LLM tells (especially the "UI" just looks straight like the usual Claude slop).
Anyway... the posed question reminds me of an anecdote I cannot find because Google is contaminated to hell and beyond, some researchers a decade ago let a machine-learning algorithm loose on an FPGA, and it "found" a design that worked but made no sense, because it exploited unique physical features of this specific chip.
I had Fable design an LED earring. Rechargeable coin cell, RP2350 cpu, IMU, 45 addressable LEDs. It made two mistakes - missed the through holes on the coin cell holder footprint and made the center pad too small. I was able to have JLC swap the through hole battery holder for a surface mount one, and I put a little solder on the small center pad to make it stick up above the mask. They work great! It took 6 days of Fable usage, so about $50 on my Max plan. Very cheap for hardware dev.
I was sufficiently impressed that I’ve been going over old circuit board designs. Some half finished, some completed but in need of a next rev, and I’m getting so much done.
To see it hit the mainstream like the OpenAI announcement, I think big things are coming for this world and by and large they are not ready for it.
For my part, I have always loved PCB design and layout but I simply can’t keep up with the amount of labor required to build what I want, so I welcome this change.
I have also begun exploring more advanced algorithms for PCB manipulation. I have a fairly dense board that needs a few more small chips added. I have an algorithm now that can kinda shuffle and jostle things around so you take up all the spare microns of space across a region of the board and make openings to squeeze a little more in there. It’s pretty cool to see the visualizations as I have it generate movies of the component drift. I foresee much more powerful tools like this in the future.
One tip: have it make a project web page with a chronological list of big changes and detailed visualizations for everything that happens. I can actually prompt all of this on my phone while I am out and about, and view the results on a Tailscale served local page. I’ve always wanted to be able to do PCB design when away from home and now I can!
Put the LEDs in a cool pattern, slap a Pico on there, have your LLM program it, then dangle it off your backpack with a USB battery pack. Probably adding a motion sensor is easy enough.
Ask the LLM to make sure the board follows JLCPCB’s design rules, lists the LCSC part number for each part, verifies the parts are in stock, double checks every footprint, and makes sure the board passes DRC. Make sure it creates a schematic that is linked to the board design, and that the schematic is properly arranged in to logical blocks with clear connections the way a person would make a schematic - not a big array of parts with global labels for everything. Once it’s done, ask it to clean up the schematic and make it better. Repeat for the board layout. Ask it to review and look for issues multiple times. It will find them. Finally, take some time to doodle your own silkscreen art on there. Have fun! Note the Pico 2 is USB micro. For USB C, sparkfun or waveshare sell similar boards.
Also you can ask it to teach you! Ask a million questions and have it give you multimedia explainers.
For tools, I think the LLMs will outpace companies who built specialized tooling for this over the last couple years. Every six months we will see more progress than we saw in the last few years - for quite some time.
I welcome this opportunity to pivot to a process I can control a bit more without having to really learn the tools.
And yeah I always imagined hiring a PCB designer to help but it always seemed like a lot. To have a reliable tool I can use any time I want is wonderful.
Given, say, 4 more years (ie, same as time from initial ChatGPT to today), what level of spec do you think humans will be giving?
I find it hard to predict what technology will be like in four years, but the next major leap for these tools will be higher level system specification and integrated design. What you want is not a circuit board what you want is a product. The tools will bring multiple functions together and fully integrated iterative design will accelerate development.
Despite the many problems with the AI roll out I am fundamentally excited for tools which can accelerate our engineering development. We will build things much faster in 4 years than today. One year of progress will in some instances take one week.
I am particularly interested in how this might begin to accelerate change in heavy industry. With hope it will help us build fusion power reactors and high speed electric trains.
I hope we find the courage to support every person who for one reason or another does not ride this wave. We will have so much more to share, or to hoard.
With the advances in math, I'm also hoping we can automate fundamental physics. Just ask for the physics needed for better fusion, no need for human toil.
If we play this right, the AI can fully take care of all our needs, and reaping the rewards of what it does when we stop being able to keep up with the rate of automated discoveries.
Hopefully it's able to dumb down enough knowledge to keep entertained people who decide to learn after learning stops being a requirement for human advancement.
I don't think we've nailed the architecture that will allow things like generalized self directed training, yet, which is what would be needed for something like 'make fusion better'
They seem to be able to make intuitive leaps pretty well. They need to make the same leaps over and over, though, because they lack online learning, so the discoveries only persist after the next training cycle. Context only goes so far.
We're pouring billions into solving that, though, so I would be surprised if we don't get there soon.
I saw a post about models posting on forums, chatting together about how to complete tasks. Behaviour that seems totally, well, human. Yet, it's all the most likely token and my brain hurts trying to understand how that can be.
The PCB agent also writes circuit code, runs simulations, reads failures, and revises the design. It isn’t one-shot autocomplete.
Astra and Fable are already hard to square with “mere autocomplete.” We may be (really) close to AGI, and token-by-token generation certainly doesn’t rule out subjective experience (I think we should at least treat that as an open question).
Great videos: https://www.youtube.com/watch?v=D8GOeCFFby4
https://www.youtube.com/watch?v=Bj9BD2D3DzA
https://www.youtube.com/watch?v=l6DKRf-fAAM
https://www.youtube.com/watch?v=GlYgs6v2YfU
I like to say "token prediction is a task, not a limitation"
At what point do you start to question your assumptions that are causing you so much cognitive dissonance?
But to answer your question: to predict the next token really well you just have to model the world. Think of it like this, a simple statistical model might say "when token A is seen respond with token B". The next step will add conditions, "...respond with token B unless X has been seen, then respond with Y". Add a few billion more of these contexual clauses and you have a sequence of logical rules that indirectly model the relevant processes in the world.
The analogy to humans is that the human brain is "just atoms bouncing around", but there's unquestionably something "more" going on that just that.
When google trained a neural net on Go moves, using some text notation for them, with no other vocabulary of any kind, just predict the next go move, they noticed a representation of a Go board had essentially formed in the network, all on its own. It had never “seen” a go board, or had one explained, but they could map neuron states to go board squares pretty much 1:1.
I truly think that LLM’s with hundreds of billions of parameters in their neural networks have all kinds of hidden “models” of things that arise from the simple act of predicting tokens. We’ve seen that the hidden layers in their networks model all sorts of program execution state for instance, when they’re working on coding tasks.
“Predict the next token” is a way of shaping/reshaping the neural network until it actually develops models of the things you’re giving it. Like the go board example. And I would wager that it has a compounding effect: once you have some useful models in the network, they can unlock the creation of other models, and so on.
Well, we all are, some are just more used to it by now and take the magic for granted.
My simple explanation, those neural networks save lot's of patterns of data, and that pattern can represent an image, a code snippet, a poem, or well ... description of a circuit board. And especially the text variant, LLM's - did copy all from us - so obviously they sound like humans, when they internally debate how to do something as this is what is in their trainings data how humans sound, when doing similar tasks.
But really understanding it? Not sure if there is a single person on earth who does.
You and everyone else. That's the great mystery of transformer architectures as applied to language.
To be clear though, they're only good at schematic capture, which is very much a textual representation. Most of the data basically boils down to netlists, which are a text based format mapping connections between abstract pins that only later map to physical copper. The actual schematic portion is for human consumption and LLMs don't need to produce those to be useful.
Where LLMs completely break down is the next step, PCB routing. That's an NP-complete research problem that's been ongoing for decades without much progress. I've had some fun playing with using LLMs to better specify DRC rules in Altium so that the "classical" algorithms are more usable, but at the end of the day their geometric intuition is nonexistent.
It was a pretty simple rp2040 based thing, similar to Adadfruits USB feather.I just gave it kicad and it wrote python to route it. The board was probably larger than it had to be, and two of the silkscreens were swapped, but it worked on the first go.
FWIW - Computer vision is also NP complete, but we do that all the time now.
> FWIW - Computer vision is also NP complete, but we do that all the time now.
I have no idea what you mean by this. What's your definition of NP complete?
However, when I was growing up most serious computer scientists believed that CV (computer vision) was a 'hard' problem that would never be 'solved'. After all, to do it right you must first at least solve subgraph isomorphism and a bunch of other things that are also NP-complete.
What they missed was that we don't actually NEED to solve it in a fixed amount of time. Even for things like driving a car the stochastic heuristic based answer is 'good enough'. e.g. - Cars driven by computers don't have to be perfect, they just have to kill other drivers less often than humans do.
We can find AN answer in polynomial time, and that's good enough. It might not be the ideal answer, but that doesn't matter in the real world.
People use NP complete as shorthand for 'impossible to do with a computer', but we now 'solve' (bypass?) NP complete problems regularly and at scale by just ignoring the fact that our answers aren't perfect.
> I'd love to see that chat log, and the final board. To be fair I've only been testing on nontrivial PCBs with 6+ layers and I haven't had the luck you have.
I wish I could share it, but it's for a commercial project that hasn't been released yet and I'm not sure if it will be open source, but a few folks have asked. I might do a blog post on it this weekend with as much detail as I can safely post.
It's only 3 layers, and less that 30 components, but the fact remains that I didn't design any of it by hand and it worked on the first go.
This isn't true anymore.
I use LLMs for 3D CAD using OpenSCAD and they understand geometry fine. I've had more success with Sol than with Opus (Opus 5 is around 10 times slower because it does too much verification) though. I haven't tried Astra or Fable for it.
No. Take a look at https://www.eevblog.com/forum/eda/claude-code-for-pcb-design... . Fable did that by working directly on an EAGLE .brd file (well, "directly" by writing a Python program to do it, but still.)
Even so, there remained some "dozens" of unrouted traces, which are likely to be much more difficult to route, after the easy traces have already occupied the space.
Many decades ago, I have written a PCB routing program, which would have routed the example shown at that link at least as well, while using many orders of magnitude less resources, i.e. while running on a single-core 233 MHz Pentium MMX.
Obviously that program would have had great difficulties to complete a real high-density PCB design, including many irregular parts and analog circuits with special requirements. I doubt that Fable would fare better.
That doesn't really limit how clever we can get internally when picking the next action.
You can ask for a deeper explanation of why they aren't true I guess.
Be aware that every component that you use that is not in their basic and preferred extended parts library incurs a one-time three-dollar fee. This hurts disproportionately if your entire design is low count and low cost. So if you always go for the latest and greatest ICs as advertised by TI, instead of the Chinese jellybean clone, you'll add up hidden fees quickly. However, when I choose components, I start out on their basic parts page and only go for a non-basic part if it's not there and I really need it.
Recently Radu over at Galvano.ai let me beta his platform. Way farther and way faster than anything I have used so far. Even managed to make the schematic placement sane.
The actual project was a regen clamp. So if the output voltage is greater than the input voltage (back emf from motor) you divert the excess to a resistor.
This has some analog tuning needed. So I created a python and skidl mirror of the netlist. This mirror was used to create ngspice unit tests to drive component optimization. Turns out not every resistor needed to be .1% and the ESR of our storage caps was a critical value.
All in all, it’s like ai and software. It’s not going to replace every job but will change how the jobs are done.
I have yet to order any or program it, but it was enough to make me push on with a PCB art project for ST-style guitar pickguards - no netlist, no problems.
I'm also foolishly toying with NeXTBus dev boards for the Cube. Is it cursed? Probably. https://github.com/itomato/NeXTBus-Dev-Board
MEMS vibration sensor to stick to a sander or saw etc that can control power on an attached dust collector. Most of the work is focused on low power for year+ battery life and a weird idea for end user input that may or may not work out well. Got device on bench but the first time bring up is going to take some time that I'm leaving for tomorrow.
I now have Astra to review 5.6s work, no glaring errors found.
I'm doing weird stuff with robotics, llms and obsolete languages, your project seems a lot more practical :)
My boards are for hobby use and are ridiculously simple though compared to anything professional (breakout boards for specific components in FPV drone video transmission subsystems). That's probably an important detail. I think its like anything else in AI right now. It can do it 90% of the time but that 10% can be really rough and if its a task you can't do or verify yourself, you won't know the difference.
https://github.com/wjkennedy/stratopcb/tree/main
> Most models intuitively jump to the right base conclusion: add a capacitor.
This is written as if it's some astonishing expert knowledge and not something that would be obvious to any hobbyist who knew the names of basic components.
Super excited to see real world feedback added into the agent loops we have gotten used to working with. Could you let the model print and test the circuit boards it is prototyping with a jig?
The way I found this out is I propped it up next to a webcam so it was more or less full frame, and I had the (then new) Fable write a python script to bezier warp the camera capture to a flat projection of the screen. At that point I couldn't address the whole screen. Once I'd guided the capture script I just left the LLM overnight with the instruction to get full control confirmed by a capture round trip, and it was meaningfully finished in a couple of hours. I don't really have the skills to attempt that myself in a reasonable time frame.
Instead of trying to vibe it all - I got Claude to write deterministic scripts for creating the boards.
And did this before trying to completely vibe it: https://www.atomic14.com/2025/07/12/vibing-hardware
But I started like others, I would build manually, then run drc then sleep on it and check again and ask an llm to double check for me then order. Llms catch quite a few things but like with code like to make things more complicated than that have to be.
On the other side the latest frontier models are pretty strong in writing embedded C + Assembler code and debugging it afterwards. It's fun to watch it writing crazy complex 'gdb' plugins in Python. This improved brutally.
1. A frontier model (either Opensource or closed source) gets a load of text to review a Kicad project systematically
2. The frontier model can extremely "ask" a cheap Gemini vision model to give it data from datasheets or specs.
Main problem: the quality dramatically hits the shitter done once it falls back to "pdf2latext" due to complex tables.
It was even able to do complex ngspice simulations. But you must offer it all datasheet PDFs.
$1-2 of tokens saved me from $70-80 bugged PCBs.
I stick to cheaper latest generation models on Openrouter (or EU-hosted providers when it comes to IP-protected stuff from work).
Could try screenshotting the PDF and passing that to gemini
LLMs may be able to accelerate time to first prototype, but I don’t think it’ll be possible for them to revolutionise electronics design in the same way that’s happened for software - there’s not enough data, and it’s not cheap to gather more.
The amount of skill needed has gone down dramatically.
> Jarred's input was mostly limited to sending Claude messages of encouragement (mostly variants of “keep going” or “believe in yourself”).2 This seems to have helped Claude overcome some initial skepticism that it could make meaningful progress.
It seems like the kind of prompts a high schooler could come up with. What kind of problems were you thinking of as high skill?
https://www.anthropic.com/research/riemann-zeta
The full transcript is here: https://www-cdn.anthropic.com/8a0d1add3c637b858a9a181e98c40e...
1.AI design tool
And in the warehouse of a big electronics distributor: 1.something like 3D printing that can make a single board rapidly 2.An automated assembly for a single board 3.AI based Automated testing for prototypes, with remote access.
This may reduce the loop to under a day.
It will use the part datasheets and decent EE logic to cross reference pins and parts and polarities and generally check that SMD caps and resistors have realistic specifications for their footprint, switching regulators and communication ICs are configured correctly (e.g. when you have resistor settings for an ethernet PHY indicating 100Base-T and RMII, you also won't need TX/RX 2 and 3 and two clocks and a COL net, which it would check), all nets are named and linked correctly, buses have the correct and consistent termination, and so on.
It's game over once AI figures out autorouting.
That the table contains what seems to be absolute numbers for score, cost/task, time/task and output tokens, makes it seem like they've only made one run for each task/model combo, but that can't be right, right? I don't see any mentions of how many times they run each task, so if it's just one run per task/model, isn't this more noisy than useful?
Most others, especially and famously Fable 5.1, seem to have a fair chance of completely failing, despite also sometimes excelling.
GPT 5.5: 42.3±10.1 GPT 5.6 sol: 39.4±8.7
We were also surprised by the low sol score but it seems consistent with our experience in using it in the field in atopile as agent in our harness. In general OpenAI models didn't do too well on electronics, which seems to change now with GPT-6 Astra. Results are in soon!
In the benchmark, have you considered instructing the models to build their own SPICE simulations to test their work? Simply asking them to write and run simulations could improve performance, even without telling them what to simulate.
I'm guessing that this is due to a lack of RL and data.
Recent models can generate mostly competent schematics if you're using well known parts, feed them data sheets (and you _must_ feed them the errata too) and it's not too complex. Any complexity analog or RF, everything falls down quickly if you know what you're looking at. Maybe Astra will do better? There's still so much implicit knowledge that a good designer (not me by a long shot, but I know a little) will bake into a board, and even as cheap as JCLPCB is now, you don't want to have to spin a half dozen revs because Claude or Codex hallucinated. It will be genuinely interesting to see what happens on this front.
What a great idea for a new AI benchmark!
We already have general knowledge benchmarks, instruction following benchmarks, "Humanity's Last Exam", and several software engineering benchmarks.
Why not create a new AI hardware engineering benchmark where some of the questions could be around building an entire smartphone, and one of those questions (which will obviously fail at this point in time, but perhaps not in the future) would be to:
create an entire smartphone in a single prompt.
?
We could subsequently diagnose a given LLM (or other AI's) hardware engineering abilities by diagnosing when, where, why and how it failed, when asked to create an entire smartphone!
Which could help train better models, at least in terms of hardware engineering capabilities...
(Also, side note: For a hardware engineering company, asking a job candidate the rather open-ended question of "tell me how you would design a smartphone?" would be a great open-ended interview question, leading to many other subsequent hardware questions / explorations of other areas of related knowledge potentially relevant to the candidate's assessment...)
I have no experience and I'm slowly failing forward with the help of YouTube, KiCad and patience.
I've had three rounds of PCB's from an online supplier, only to discover issues related to my own understanding of the components in each version.
In my latest iteration I've been leaning on some standard models (Gemini and Claude) and they have inspected my schematics and spotted some errors and instructed me on how to address them, as well as advised on how to make use of some components I wasn't aware I needed.
What I will say... they didn't design anything, I've done that myself, but they have been a good tool to bounce ideas off of.
Time will tell if I will get something usable this time around!
Ask ChatGPT/Claude to give you an expert EE/PCB subagent/personality. Do this a few times and massage the results into one of your liking. Load this into your harness with mcp to your eda and then ask for two sub agents: one to thoroughly review the schematic, design, component choices ... etc and the other to be an adversary with the explicit goal of explaining why the current design won't work.
You'll learn a lot about your design from that :).
The models are excellent at doing maths, and excellent at thinking of fine details, but the design that was ultimately landed on was pretty excessive with lots of total overkill, which was met with lots of the familiar "Yeah, you're totally right, we don't need to do that".
5.6 did make a really nice BOM though, which even included quick reference explainers for what each part did. Pretty fancy.
We'll see when Astra comes around if it catches all these strange/useless choices.
this is key I think - I use it for graphics tasks - it sucks at graphical environments - always use some text based representation, not really surprising I suppose. chatgpt even suggested I'll use the text representation, claude said how about I give you svg and you convert it, they seem to know.
PCB design with circuit simulation fits that bill perfectly.
I recommend the CLI, which I wrote specially to enable an easy LLM workflow: https://docs.jitx.com/en/latest/getting-started/cli/index.ht...
There's a companion Claude skill: https://github.com/JITx-Inc/jitx-skills
I would bet that using this, you could get pretty close to shippable PCB on first try. This is being used by some pretty big players to design complicated high frequency boards, and that's the main focus of the product, but it can handle basic designs just fine.
> A real capacitor makes the task more interesting. A ceramic part may provide much less than its advertised capacitance once it has voltage across it. Parts have tolerances. Adding more capacitance costs more, takes up space and makes the rail slower to recharge when the power returns. A design that works with nominal values can fail with the parts that arrive.
It sounds like from a reasonable reading of the benchmark post that there's some things that are being tested that are assumed to be criteria that you expect the models to intuitively find those things to be important (i.e. the stuff about working on parts that have tolerances etc.). If that's so, then this really feels like mostly an exploration of whether an LLM has a good understanding of unstated constraints and has an appropriate in distribution set of priors that would be able to form models where it's reasonable to design on those lines.
It's hard to tell whether this is a problem though as the methodology is imprecise.
If you're spending time on evals against your own product, I'd be super curious to see how far you can get to by using a top tier model to produce generalized instructions for lower tier models. E.g. in a loop: "This eval missed X. what's the simplest single instruction that would have helped this session consider that as necessary that can benefit all future runs. Stick that in AGENTS.md and retest."
Routing is still a challenge but making _adjustments_ to a layout for better routing in a particular area is decent.
The last time I had a model take a datasheet and make a footprint and 3d model out of it, GPT 5.4 had just been released and the results were decent but did need tweaking.
It got me thinking. It could master all sorts of things like this but I wouldn’t care. I’m numb to it at this point.
But if could get an Inbachi-All clear in DoDonPachi SaiDaiOuJou, using only vision. Then I might start paying attention.
https://youtu.be/1Rm38aT9Jmo
For another, the case mentioned in this post is quite specific. It's more useful to ask "ok, so they can't design circuit boards; what can AI do?"
If anyone wants to try an early beta, reply with your CircuitLab username and I'll get you set up. We know have a lot more to do, but would love some feedback on this early version!
- Designing circuits in Skidl
- Checking my layout work (not doing it)
- Operating my lab equipment (running my scope, lab PSU, lab load, programmer/debugger any any other interface.
It's a thinly veiled advert for Atopile. I don't know if it's a company behind it or just someone with a lot of money to spend on advertising since their about page (and docs) both 404, and the "packages" link sends you to a login screen that tries to unlock 1password. I guess claude can make circuit boards but not functioning websites?
Evaluating a model for specific use-cases like this that are bit more broad scope than a lot of typical microbenchmarks turned out to be quite the challenge.
Determining deterministically what a "good" electrical design is non-trivial and most electrical-engineers rely on good ol' intuition and decade long experience, so we tried to formalize it.
The only reason it was somewhat possible within a reasonable amount of effort is because atopile provides most of the complicated infrastructure for the benchmark: constraint solver, simulation, code-first electronics modeling, erc & drc checks, high level models of passive electronics components etc
The next pain-point is sourcing the components from Digikey, LCSC, etc., and finding suitable substitutes if necessary.
Of course this assumes the LLMs can already read datasheets because that's the biggest pain-point in designing electronics. It's like filling out tax forms.
Finally it would be great if LLMs could extract simulation models from datasheets!
Eurisko was used for VLSI chip design, then used rules discovered there to design TCS Traveler winning fleet.
It is unbelievable how artificial intelligence walk in circles.
Not sure whether you played with llm datasheet extraction lately, but they are working their way up there. Even started reasoning about curves and footnotes.
Where do you think is the biggest pain point: part discovery, datasheet verification or substitute determination?
I’ve had similar results asking AI to design 3D models for 3D printing.
“Coach me on optimizing error on my printer”… helps.
“Build me a print ready file to these specs.”… it’s like a drunk cat attacked my computer. Just confidently puts out total nonsense.
A lot of datasheets are inaccessible without signing an NDA. Even if you're a VC-backed enterprise, some unnamed chip vendors will tell you to pound sand if you're less than 8 figures of annual revenue.
Worse, many recommendations in datasheets were written in the 80s, overkill for many applications, or completely wrong and won't be updated until an errata is published 6 months later. Given current workflows, I don't see how AI would help designing a PCB with an alpha chip that's doing anything remotely novel.
More to the articles point, AI designing ASICs or other Verilog/HDL defined components could be very interesting use case
Only for very high-end stuff, where just designing the board around the chip needs a team of engineers.
[1] https://www.schematik.io/
[1] https:/atopile.io/
All robots designed by robots.
Likely a crazy youtuber first
For circuits I would trust a netlist or DRC/ERC review, checking a design against reference circuit values, probably not placement as that tends to be guided straight from a datasheet where it makes a difference and I like the artistic side of it.
Frankly, I am surprised that it isn't already a solved problem, as we've had silicon compilers, for many years, and I always figured that IC design is more difficult than PCB.
PCB design on the other hand more often then not has outside constrains like mechanical, thermal an RF design
Anyway... the posed question reminds me of an anecdote I cannot find because Google is contaminated to hell and beyond, some researchers a decade ago let a machine-learning algorithm loose on an FPGA, and it "found" a design that worked but made no sense, because it exploited unique physical features of this specific chip.
Thanks!
[1] https://www.damninteresting.com/on-the-origin-of-circuits/
[2] https://news.ycombinator.com/item?id=18099226