- I didn't like the "truth tables" one, I got many duplicate questions and for some reason I got only one second for the first question. The rest of the questions I managed to answer correctly but I still got only one start out of three?
- I got very confused by the capacitor. Capacitors do not have an "enable" gate! In fact, in 2.7 (1T1C) you are supposed to build the enable gate -- with a transistor. So currently, you can just simply not build the enable gate and use the one already in the primitive, meaning you don't need the NMOS gate at all.
Was this made using LLM-assistence? (Not judging, I'm just interested!) I'd love to hear more about your workflow and how you managed to produce a good UI as it's something I couldn't do if my life depended on it, and it's a skill I'd like to learn.
Oh, I didn't notice this capacitor bug, I changed it to add an enable gate for 2.4 (for context, i created 2.4 after 2.7 b/c i thought 2.7 wasn't obvious enough for some ppl). 2.4 kind of needs the enable pin b/c of how my simulation system works.
Yeah, I felt pretty conflicted on the capacitors whilst building, theres actually a note about this in the capacitor info block in later levels, but I couldn't really make a true capacitor compatible with the underlying simulation system I had built (I should have thought it through from the start).
Ill fix the truth tables bug (i think i know the issue), the stars come from playing in endless mode
I used claude quite a bit, it struggled through a lot of this (wiring and simulation systems in particular), but managed to crank this out, for the graphics i was extremely detailed in terms of what i wanted i'd say
Since we're in feedback mode, 2.16 has no BitLineBar reference to feed to the comparators. I had to cheese the level by connecting the "capacitor" outputs straight to the outputs, and it worked.
On the capacitor though, the capacitor level is weird as you don't build the capacitor charge system with transistors. Though I definitely get that the simulation engine is for digital stuff, not analog :)
Also a general feedback on the time-based challenges: dial them back. A lot. Most of them are just not interesting and have zero learning value. In fact, the "DRAM refresh" one just made me quit the game (clicking on 8 rows to keep them fresh). Okay, 10s is enough, I got the point. No need to hold up for a whole minute. Kinda same for the hex one. However, some of them are good, and the UI for the binary ones is great, especially for the two's complement one!
Small nitpick on the UI: some blocks don't have their connections aligned with the grid, making the wiring OCD-incompatible. But that's minor. It's a shame since the wire routing algorithm works quite well overall, and I'm impressed an LLM could produce that good of an UI!
Otherwise, quite a fun little game, if slow paced when one already knows some bits of digital logic. Keep up!
I'm still confused about 2.7 because it says that we have to use WL so that "the bit line (BL) connects to the storage element for reading or writing". But the accepted solution connects to the storage element only for writing, not for reading (the capacitor is always connected to the output for reading).
I would think that if you wanted to make it so that the storage element was connected either for reading or for writing by the WL and otherwise disconnected, you would need two transistors, not just one.
Perhaps this was meant to say "for writing either a 0 or a 1"?
Agreed, truth tables one is important. But it's backwards, you test people on truth tables before teaching them.
If someone is seeing this for the first time they may have never seen some of those gates and you quiz them.
Then finally after passing the quiz, you define NAND and NOR and Inverter.
Swap the teaching one to be the intro to the truth tables one.
Second bit of feedback is the timer. Increase the time allotted. I know them very well and still was struggling to get all the input correct before the timer hit. Or consider possibly just eliminating the timer completely - if your goal is to be sure that they know them.
good point, made an update that added difficulty levels to the minigames (handles the timer), and i'll probably move the truth tables minigame to after the user builds the truth tables, thx
Anyone who likes this should also take a look at: https://store.steampowered.com/app/1444480/Turing_Complete/
At the end you have your own CPU with your own assembly language.
Sadly stuck in early access since forever with some very rough edges
Steam discussions seem to imply there is still something happening https://steamcommunity.com/app/1444480/discussions/0/7674379... But communication is definitely subpar. I completed it a few years ago, was fun but having prior knowledge about digital circuits is a must have in my opinion.
They're bikeshedding pretty hard, making their own language for the simulation. You can access the unstable branch through steam, it was getting fairly regular updates last I checked.
I worked on deep sub-micron, full custom mixed-signal integrated circuits for more than a decade, and I can't pass the first level.
> Wire an NMOS transistor so that when In is 1, the output is pulled to ground (0). When In is 0, the output should be unconnected (Z).
Certainly:
(a) The nMOS has 3 connections: its drain is only connected to the output (no +Vdd supply), it's source is tied to ground, it's gate is tied to the signal input
(b) When the gate (input) is driven high, the nMOS transistor turns "on," connecting the output to the source (which is grounded). This acts as a "pull-down network"
(c) When the gate is driven low, the nMOS turns "off," leaving no connection to the output. This is equivalent to a "high-impedance" / "unconnected" / "Z" output
Fails 1/2 tests
(Edit) - I thought the light grey, thick line on the background grid was a wire from "input" to the transistor's gate. It is not. You need to explicitly add a wire from "input" to gate :\
I solved it but I had to use 'two' NMOS transistors unlike the direction.
Wire an NMOS transistor so that when In is 1, the output is pulled to ground (0). When In is 0, the output should be unconnected (Z).
The way it's worded it sounds like you need 'an NMOS' ie a single one? So I messed around but then I remembered seeing gates made from two transistors in my dusty memory.
(edit) I see there _is_ a one transistor solution... I'm pretty sure I tried that though. :/
lol, mb. As in understand it, its that the colors of the bg make it seem like its wires when its not, I'll change the color theme a bit to fix (plz correct me if my understanding is wrong)
Yes, that's the issue: the (thick) solid grey "major axis" lines on the background seemed to be a wire.
If I could make a recommendation, get rid of the grid lines entirely and only have 'dots' at regular spacing. Here's what Cadence Virtuoso looks like (the most popular circuit schematic tool for integrated circuit design):
the part that tripped me up is 0 showing in deep RED and I thought that meant I was doing something wrong. I came here, read this and realized I was actually right and then pressed the Run tests button and passed. This is a UX thing you'd want to address
This looks really cool, although I personally seem to lack the absolute basic knowledge that is required to make sense of the tutorial messages, so I couldn't even figure out the first level.
Thanks for telling me this, I actually made an act 0 that went through the basics + physics of the pmos and nmos transistors, but i scrapped it b/c i couldn't get it to look like I wanted it to, will add it back
Glad I'm not the only one! I love these kinds of games; played the heck out of Turing Complete and Zachtronics' Engineer of the People... But I'd never heard of 3 state logic until today.
Really threw me for a loop! I'm still trying to wrap my head around making level 3's NOT gate.
This is such a cool idea, definitely the first 3-state circuit puzzler I've seen! Throw a cute story over it and I bet this would get some takers on Steam.
You need to have a, "Okay, I've tried 10 times, it's not working, what's the answer?" button. That will help not just us rubes who can't understand, but also in the off chance something is broken and even "correct" answers are being rejected.
makes sense, adding to the next push (in the interim, u can also use the copy circuit button to ask gpt if ur correct or not), also, what level is this? (if u dont mind me asking)
Oh that's what the "copy circuit" button does. I have been trying to paste circuits from previous levels into subsequent ones and wondering what I was doing wrong
Nw! This is an excellent game overall. I have always had a REALLY hard time understanding the electronics behind gates and this has been super helpful. I understood the physics behind NMOS and PMOS, and separately what logic tables represented and could be combines for higher order execution. The first few levels, constructing NANDs and NORs, has always been a puzzle - until today! Thank you <3
This seems really cool, haven't played it yet but I took a glance at the first two levels and it looks similar to another game I've played - will definitely play through it when I get a chance. I wanna make a GPU but my board doesn't have nearly ennough dsp units, so a virtual one like in this game will have to suffice lol
This reminds me of the Zachtronics game KOHCTPYKTOP (https://zachtronics.com/zach-like/). The game left me wanting more and wishing I was using an actual tool for learning or designing semiconductors circuits, rather than playing a game.
Well done. I enjoyed it and also found it interesting that the js was under 100k and served with br-encoding. I'm using gzip by default everywhere, but maybe should take a look at br for text-based content.
I was able to do the latch level (2.11) using a single OR gate. It did pass the tests, but I am not sure if what I did actually works in practice. (Force as one input, then feed the output of the OR gate into the other input) The fun fact after completing the level mentions a bistable latch (I don't know what that is) using two inverters, which I didn't use.
as a learning resource, it would be great it acronyms were expanded at least once. nmos, pmos, gnd, vdd all in the first 5 seconds or so, and i didnt see anywhere that actually said what those stood for
otherwise, looks polished and fills in a nice niche!
There's the info boxes that it could be added to, that way it is always available at a mouse click.
That said, I'm not sure how useful expanding most of the acronyms would be. Names like Negative/Positive Metal Oxide Semiconductor aren't exactly self-explanatory, Vdd isn't really an acronym, etc..
I had an arc 0 where it went through some of these topics more in depth and explained them, deleted it b/c i couldn't get the UI to look right. I've pushed a bandaid that should fix this, but ill bring in arc 0 (it seems this is a popular request) after polishing it (ill also make it optional)
Really glad to see this kind of game getting traction. I've been working on Hard Chip (a transistor-level CMOS circuit puzzle game) for a couple of years, and the niche is a bit lonely sometimes. Games that make low-level hardware concepts tangible seem to be finding an ever-larger audience every day. Excited to try your take on this with this one!
Really cool approach to teaching GPU architecture. The progression from basic logic gates to actual GPU components is exactly how I would want to learn this. Much better than reading datasheets.
One thing that would make it even stronger: a brief explanation panel for each level showing what real-world GPU component the puzzle maps to. When I completed the truth tables section, I wanted to know where that pattern shows up in actual silicon.
Seems cool but its just not quite responsive enough on Android Firefox. It seems to almost fit, but i think things are cut off. Controls dont seem to work - i think the materials are off screen because the directions say to select materials but I dont see where to do that.
it's great, i really like it! i've been working on something similar for CPUs but not getting into the EE weeds (like i don't get into DRAM at all, no voltages, no slew rates, etc, etc).
it was all reasonably easy to get until you get to the sense amplifier which has an almost complete lack of explanation of why you need the required outputs, it is "clear if already known". i.e. if you've never done any electrical engineering it makes zero sense and is not the sort of thing a software developer could ever figure out with the minimal explanation.
This is super cool but part of me wishes I could skip to the later levels rather than redo college homework from a decade ago. Maybe that ruins the fun but also slogging through the early levels (especially when the UI is a bit rough around the edges and doesn't support copy paste) isn't fun either.
I really like the game as a concept, and I got pretty far already, level 2.16, but I feel like some levels aren't making much sense at all in terms of the goal and how the passing circuit fulfills the objective. The Latch and some others had me puzzled. Because it is clearly vibecoded I feel like I cannot really trust the educational material all that much and at times it's not clear if I am misundestanding something or if is just nonsensical LLM slop.
This is a fantastic way to make GPU architecture more accessible. I really like the hands-on approach to learning digital logic through a game format. Looking forward to seeing how the simulation system evolves!
Awesome!
Small feedback: The test should maybe auto run. I solved the first level and was confused why I didn't proceed. The out was -1 (but goal was z) and it took me a while to see the 'run test' button.
Layout appears unusable on my phone on Firefox Android (both portrait and landscape). Necessary elements seem to get hidden behind others. Not sure if I'm even supposed to be able to play it without kB&m though lol :)
I love this! I learned my first logic with Crocodile Clips: would simulate and solder a lot of D flip flop based logic before learning about microcontrollers (my first was Atmel AT90S2313)
- Nice idea, though after playing Turing complete, I would like to skip the beginning and move to stuff that makes GPUs different to CPUs. But it's understandable.
- I'm not smart enough to intuit NAND from transistors. I'm also not sure I will be alone in that. It's such a weird difficulty wall.
- Speaking of, the difficulty is all over the place. Though easy mode is appreciated.
- Even with a n key rollover keyboard, I couldn't complete the capacitor refresh level. It seems like it speeds up and certain capacitors already start empty.
- The routing for wires is no good atrocious. Any level with more than 8 components will end up impossible to read.
- It doesn't help that you can't color code or even path wires manually.
- Might be Firefox only, but I had a hard time selecting the connection points.
- Dragging the mouse along the edge should pan. Otherwise you have to drop the connection and zoom.
- I appreciate the added "show solution". But it's not really giving you a solution. It's just a better hint.
- An option to show all tests or at least more tests would get great.
> I'm not smart enough to intuit NAND from transistors. I'm also not sure I will be alone in that. It's such a weird difficulty wall.
I agree with you, because I feel like I only got that one because I happened to get curious about CMOS (PMOS + NMOS) logic earlier this year, and remembered the general idea from before. Otherwise, I don't think I would have figured that out either. Google image search for CMOS NAND basically shows the solution, but the game doesn't tell you that's what it is until after you beat the level. I think seeing the answer, then immediate trying to reproduce it from memory is a good way to learn. Then if you try again the next day/week/month and are still able to remember it, then you've learned it.
I also looked up a solution for the full adder since I couldn't quite remember how it worked.
Tangentially, I've gone through similar material over time repeatedly in the games nandgame and Turing Complete, going through the Nand 2 Tetris course (on Coursera), building Ben Eater's breadboard 8-bit computer, reading "Code" by Charles Petzold and "The Pattern on the Stone" by Danny Hillis and "Digital Computer Electronics" by Malvino since that was what Ben Eater partly based his computer design on, and going over digital logic in CS-related EE courses up through how a CPU is made. But most of those barely cover anything below the logic gate level and I don't think any of them covered CMOS/NMOS/PMOS specifically which is why I got curious about them this year.
It's pretty fun though (my type of fun anyway), and I'm really curious to see how the rest of it goes since it's building a GPU instead of a CPU for a change.
Any easy way to make this usable on mobile? In portrait mode things are unreadable, zoom and scrolling do not work. Landscape is even worse as everything is out of view (and zoom/scroll do not work).
Honestly it's more or less usable already - maybe matter of display size compared to other comment. One thing that is killing the fun is that it's impossible to delete something. That or even undo button would make it enough to have fun with it.
This would be such a good game for introducing students to digital technology! This is so fun! We just had to draw them by hand back in the dark ages of the 2010s.
100% agree - the way that you have the very subtle arrows on the transistor drains that show the actual current flow is really smart too. I struggled with visualizing the current flow in undergrad for an embarrassingly long time.
I'm confused about a difference in the NMOS and PMOS. The scenario I'm confused about is when the source is VDD and the drain is connected to GND and output.
For the PMOS, the output toggles between 1 and 0 (opposite the gate) as expected. However, for the NMOS, the output is always 0.
I don't understand why GND pulls VDD down to 0 for the NMOS, but not the PMOS.
Oh, the drain should only be connected to the output, not drain aswell (irl this would kill one's chip, I'll add a feature to show short-circuiting). on pmos the source should be vdd, on nmos the source should be gnd (this doesn't apply for some later levels, but does for earlier ones).
I would have really liked to have a temporary node to test the outputs.
Better than that, I would have liked to see the truth table update in real time without running the tests.
A nice game, though the truth table lighting round is pretty punishing! Big contrast to the circuit building part where you can take your time. Personally I'd drop the time requirements from that quiz section.
if you solve a level, then press "next level", then solve that next level - then it still shows the original level (I think it just gets hidden below the new one and then reappears after a solve?)
The truth tables are way too hard for me. I need time to think and the 10 seconds is way too fast. If this is intended to be a teaching resource, avoid timers IMHO. It needlessly excludes people.
makes sense, idk if i want to remove times altogether (i personally found it fun + i want the game to be fun for all levels of familiarity), but ill add a modal to explicitly select difficulty level at the start of the racer game, i def agree w/ u overall
The 2.13 level ("hex racer") is kind of pain. Apparently I'm not fast enough at dividing/multiplying by 16... when I get something like "convert 0xB3 to decimal"
lol, I hadn't seen that video before but its a good one. Na, this is the guide to comp arch that will (hopefully) end all instances of toil over documentation for any sort of processor when learning
It's always nice to see educational games like that.
A lot of new learners (like me) are just looking at the high level stuff, where the computer "just works"...
Love it, thanks! Would you mind making it possible for me to see my "circuit" after running the tests? Currently, I can't go back to the circuit I created.
I haven't pushed to github (Will do this soon), but I believe that i've fixed the issue (also, by wanna fix this bug I meant I want to fix this bug, (but would def also appreciate help if ur interested, the mechanics of this game ended up being a bit more complex than I initially envisioned lol))
No problem. I am currently on the third level I think and my laptop fan ramps up, so I closed the tab and it stopped. Also, how can I delete e.g. transistors again?
I see, I'll try to reduce the load, i'm using canvas 2d so that could be causing it. you can delete by selecting then pressing the delete button (will also allow right click to delete in the next push, since i do this for wires)
Bro. I'm obsessed with this. I spent a good 2-2.5 hours on a trot with this. This was one of those things I always wanted to learn a lot about and this was just perfect for that. It wasn't that easy, I really struggled and gave up on some levels but came back and struggled through them. The HexRacer type levels are difficult and I wish I could skip through those.
Also when you give a solution, you probably need an explanation of why that works.
Can't wait till you add the additional coming soon levels.
Your feedback feature seems broken. I tried giving feedback about some basic bugs and it kept saying can't send message.
Please also add a waitlist to notify when you release the additional levels.
They're all slightly different in terms how the construction of a computer is pitched, none of them are perfect, they all have quirks and flaws, but they're all fun.
Some like Human Resource Machine take the approachof
I wish Turing Complete wasn't quite so buggy or awkward, for a while it was by far the most promising of the bunch, but it's never quite polished and it's ended up in a bit of frustrating state.
Notable mention also to The Signal State, Shenzhen I/O, and TIS100 which are higher level than this, but scratch a similar itch.
there's ones like TIS100 which I keep meaning to revisit, but I find it very difficult to get back into these games without starting from scratch, and resetting my TIS100 progress is too intimidating.
The aspect that I especially like is covering the 3-state aspect of the logic. Studying CS, it was kind of vaguely mentioned, and we skipped over to doing logic diagrams with gates and the assumption of 2-state logic really quickly...and it seems like most games do that kind of skip too. Working at the transistor level grounds it better to the actual components.
I've made it through about the first ten parts of section 2. Some additional feedback I've put together:
* Sometimes explanations are overly lacking, other times they get repetitive. This feels like it needs to be accompanied by a course to fully deliver value. For instance, we're kind of thrown into truth gates without having really gone over them. And understanding how to combine NMOS and PMOS gates could use a better intro. Once I knew the answers, I got my brain to reset to my VLSI course from college, but I think a better primer could've accomplished that. In other places, I feel like we get more refreshers on some components than others.
* The routing algorithm needs to be better. I get a lot of staircase wires and straight up overlaps.
* Right clicking should clear attempted connections.
* There should be away to delete components you've placed. Maybe I just couldn't figure it out.
* I think icons should be included on the components pane. I kept clicking NOR when I wanted NOT and a better visual cue would have helped.
* It feels like difficulty is all over the place. Perhaps this is corrected with better explanations, but creating the NAND gates and NOR gates were much more difficult compared to AND and OR. Perhaps actually having us construct those gates without NOT would change the difficulty curve.
* The success overlay shows up too fast. Especially on levels that are just a demonstration (like the NMOS and PMOS Again levels) you don't get to to see everything the level is trying to demonstrate before the level announces that you have succeeded.
* In the intros, when there are new components, their description pops in. Instead, it should just advance like a slide. It's very jarring.
* Also, it's unclear that those aren't part of the intro. Maybe instead of popping them up, flash the little information icon next to them.
* What you call a capacitor I believe is actually a combination of a transistor and a capacitor. I think people will be hard pressed to find documentation on a capacitor with an enable switch. But, then you use this same capacitor to form a 1T1C cell. I'm rather confused.
* Many times when I finished a level, the circuit would switch to a prior level's solution.
* Some components have the same letters for every terminal (e.g. half-adders), meaning you need to scroll over the terminals to know what they do.
* Some levels have many test cases, and there's now way to see them all.
* Level 2.3 talks about us having registers, but we never covered those. In fact, I think we're still a ways away since we need to get from switches to flip-flops then to registers.
There isn't much order to this. Just what I recorded while working through it. Overall it's pretty good, I just think polish would got quite a ways.
Thank you for sharing this! I'm really excited to get to the more GPU specific parts. I basically did this for CPUs in college and I'm excited to see what preconception and missing conceptions I have for GPUs.
Thanks for all the feedback! I've fixed some of these issues (e.g., capacitor levels, switching back to prior levels upon finishing / refreshing, deletion (theres a sign when you hover a component now)), but many of them i'll be fixing today.
I'll be uploading arcs 3 and 4 soon (which will be programming the CPU and the start of GPU arch soon (people have gone through arcs 1 and 2 slightly faster than I expected)
yeah, I felt that when playing myself, do u think this level is not necessary given previous levels? (it would also help me if u indicated ur level of familiarity w/ the concepts s.t i can calibrate)
is there any source or game like this specializing to create microcontroller, like arduino, wemos (not the IC), what kind of protocol is supposed to use.
not to my knowledge, but i'd consider adding this in (i'm planning to extend to TPUs and apple silicon NPUs later, so i might just add this in aswell). what would one want the levels to look like?
first level is impossible to solve for me! Hint or showing solution did not work! Also adding multiple sources or ground behave differently than connecting to the same.
Next update has warnings about bus contention (multiple things into one node) when its an issue, and will have a proper show solution button.
For level 1.1 the solution is basically to take the ground and use that as a singular input to the source pin of an nmos transistor, let the input to the level be the gate pin of that same nmos transistor, and to let the drain (top) pin of that nmos transistor connect to the level's output
None yet, will try to remember not to clear cookies :) Sometimes games that don't maintain user accounts let you save progress in a file and restore it later, so that it survives loss of browser state, see e.g. https://microcorruption.com/
Thank you for the game by the way! It's nice to recall my asic classes, and looking forward to GPU specific chapters.
Ok you have put a lot of work in this and it looks impressive. But it needs a serious balance change. It is far too hard. Currently this may work as a brain teaser for people in the industry or people with computer engineering degrees, but it wont bring any fresh young minds into the industry. The fresh young minds will be scared off.
Teaching is challenging stuff. You have to step out of your current mindset and think with the mind of someone that sees this stuff for the first time. It is not easy to make things look easy and simple. Specifically, I think you need a lot more exploration about cmos logic, about how one side pulls the output up or the other side pulls the output down but they are never on at the same time, about how they effectively amplify the result so the output does not have to depend on the power of the input, etc. Perhaps you can try to have people design things in NMOS logic than in PMOS logic and then combine the two to make a CMOS design to see how they complement each other.
But I do not want to discourage you. This is a very promising start and you should continue if you have the time.
Also, the timed answers -- are you kidding me? The time is waaay too short. And you fail all if you fail a single answer. Oh what is 0xDE in decimal, all I have to do is multiply 16 by 13 and add 14 to that. In my head in 12 seconds. Also the time is not sufficient for filling out truth tables, especially with a laptop trackpad. I was able to pass the truth tables, but gave up on hexracing.
Ok and here are some more specific issues.
-The wires seem to snap in position in a way that they superimpose each other so it becomes very difficult to see what your circuit is doing.
- truth tables seem to be bugged. If you have more inputs than the gate whose truth table you are looking at, sometimes it will generate a fictitious truth table with extra inputs. Thus, some times i get a NOT truth table that has two inputs.
- the ground element should have its connection circle on the top, not the bottom. I realized that you can rotate by pressing R, but the site does not mention that anywhere.
lol, yeah, the time should be fixed though rn I think? depending on what level of difficulty you select in the racer game. The wiring is something I've been struggling with, working on making it better.
I intentionally made it s.t the truth tables are based on not just the input into the node, but based on all actual inputs to the node (so if you have additional processing on input x and y, itll show you the not w/ respect to input x and y and not just the immediate input).
So, is there anything about GPU's in here right now?
I didn't actually finish Act 2, but it seems to end in a conventional processor with the GPU first coming after another two acts currently under construction.
Not at the moment unfortunately, I've actually completed a good chunk of the GPU levels, but I think ppl will need to do act 2 and 3 for it to make sense
Yeah, nand game was part of the inspiration, I felt that it was good but was a bit plain UI/UX wise and obfuscated / simplified some things that it shouldn't have
We need more games like this so that the younger population get some sort of exposure to the hardware side of things, before AI takes over that field. I would also think that take-home electronic and soldering kits for adults and younger folks would be another way to reduce dependance on AI.
oh its b/c of the contention between the outputs of the ands for the answer, u need an or gate to merge them (ill add an update w/ visual feedback for these sorts of thigns)
Nice vibe coded project. There are a few UX holes i've encountered so far: No way to go to the next lesson if we dismiss the modal (have to go back to the tree and then click the next lesson)? more hints or step wise reveal if user gets stuck will be very helpful
Yeah, I had added it to make it compatible w/ my simulation system, just changed how I was handling the levels altogether, if it still has 3 try doing a hard refresh (Ctrl + Shift + R on windows, cmd + shift + R on macos)
Some comments:
- I didn't like the "truth tables" one, I got many duplicate questions and for some reason I got only one second for the first question. The rest of the questions I managed to answer correctly but I still got only one start out of three?
- I got very confused by the capacitor. Capacitors do not have an "enable" gate! In fact, in 2.7 (1T1C) you are supposed to build the enable gate -- with a transistor. So currently, you can just simply not build the enable gate and use the one already in the primitive, meaning you don't need the NMOS gate at all.
Was this made using LLM-assistence? (Not judging, I'm just interested!) I'd love to hear more about your workflow and how you managed to produce a good UI as it's something I couldn't do if my life depended on it, and it's a skill I'd like to learn.
Ill fix the truth tables bug (i think i know the issue), the stars come from playing in endless mode
I used claude quite a bit, it struggled through a lot of this (wiring and simulation systems in particular), but managed to crank this out, for the graphics i was extremely detailed in terms of what i wanted i'd say
On the capacitor though, the capacitor level is weird as you don't build the capacitor charge system with transistors. Though I definitely get that the simulation engine is for digital stuff, not analog :)
Also a general feedback on the time-based challenges: dial them back. A lot. Most of them are just not interesting and have zero learning value. In fact, the "DRAM refresh" one just made me quit the game (clicking on 8 rows to keep them fresh). Okay, 10s is enough, I got the point. No need to hold up for a whole minute. Kinda same for the hex one. However, some of them are good, and the UI for the binary ones is great, especially for the two's complement one!
Small nitpick on the UI: some blocks don't have their connections aligned with the grid, making the wiring OCD-incompatible. But that's minor. It's a shame since the wire routing algorithm works quite well overall, and I'm impressed an LLM could produce that good of an UI!
Otherwise, quite a fun little game, if slow paced when one already knows some bits of digital logic. Keep up!
Thanks, I appreciate all the feedback, fixes coming in the next push
I would think that if you wanted to make it so that the storage element was connected either for reading or for writing by the WL and otherwise disconnected, you would need two transistors, not just one.
Perhaps this was meant to say "for writing either a 0 or a 1"?
If someone is seeing this for the first time they may have never seen some of those gates and you quiz them.
Then finally after passing the quiz, you define NAND and NOR and Inverter.
Swap the teaching one to be the intro to the truth tables one.
Second bit of feedback is the timer. Increase the time allotted. I know them very well and still was struggling to get all the input correct before the timer hit. Or consider possibly just eliminating the timer completely - if your goal is to be sure that they know them.
also lmfao bikeshedding a custom language is EXACTLY what i would expect from the dev of that kinda nerd game. feels like a good sign tbh
> Wire an NMOS transistor so that when In is 1, the output is pulled to ground (0). When In is 0, the output should be unconnected (Z).
Certainly:
(a) The nMOS has 3 connections: its drain is only connected to the output (no +Vdd supply), it's source is tied to ground, it's gate is tied to the signal input
(b) When the gate (input) is driven high, the nMOS transistor turns "on," connecting the output to the source (which is grounded). This acts as a "pull-down network"
(c) When the gate is driven low, the nMOS turns "off," leaving no connection to the output. This is equivalent to a "high-impedance" / "unconnected" / "Z" output
Fails 1/2 tests
(Edit) - I thought the light grey, thick line on the background grid was a wire from "input" to the transistor's gate. It is not. You need to explicitly add a wire from "input" to gate :\
Wire an NMOS transistor so that when In is 1, the output is pulled to ground (0). When In is 0, the output should be unconnected (Z).
The way it's worded it sounds like you need 'an NMOS' ie a single one? So I messed around but then I remembered seeing gates made from two transistors in my dusty memory.
(edit) I see there _is_ a one transistor solution... I'm pretty sure I tried that though. :/
If I could make a recommendation, get rid of the grid lines entirely and only have 'dots' at regular spacing. Here's what Cadence Virtuoso looks like (the most popular circuit schematic tool for integrated circuit design):
https://www.eecs.umich.edu/courses/eecs311/f09/tutorials/cad...
Really threw me for a loop! I'm still trying to wrap my head around making level 3's NOT gate.
This is such a cool idea, definitely the first 3-state circuit puzzler I've seen! Throw a cute story over it and I bet this would get some takers on Steam.
Ive added this to the HN Arcade! https://hnarcade.com/games/games/mvidia
- https://www.nand2tetris.org/
- https://nandgame.com/
otherwise, looks polished and fills in a nice niche!
That said, I'm not sure how useful expanding most of the acronyms would be. Names like Negative/Positive Metal Oxide Semiconductor aren't exactly self-explanatory, Vdd isn't really an acronym, etc..
One thing that would make it even stronger: a brief explanation panel for each level showing what real-world GPU component the puzzle maps to. When I completed the truth tables section, I wanted to know where that pattern shows up in actual silicon.
it was all reasonably easy to get until you get to the sense amplifier which has an almost complete lack of explanation of why you need the required outputs, it is "clear if already known". i.e. if you've never done any electrical engineering it makes zero sense and is not the sort of thing a software developer could ever figure out with the minimal explanation.
- Made timed minigames optional (e.g. binary tables)
- Added 7 (optional) intro levels to walk through pmos and nmos transistors
- Fixed the bug in the capacitor levels
- Changed editor bg to use dots instead of lines to fix wire confusion
If anybody can create something similarly interactive, educational and hands-on for microbiology or robotics, I am happy to sponsor your cost.
- Nice idea, though after playing Turing complete, I would like to skip the beginning and move to stuff that makes GPUs different to CPUs. But it's understandable.
- I'm not smart enough to intuit NAND from transistors. I'm also not sure I will be alone in that. It's such a weird difficulty wall.
- Speaking of, the difficulty is all over the place. Though easy mode is appreciated.
- Even with a n key rollover keyboard, I couldn't complete the capacitor refresh level. It seems like it speeds up and certain capacitors already start empty.
- The routing for wires is no good atrocious. Any level with more than 8 components will end up impossible to read.
- It doesn't help that you can't color code or even path wires manually.
- Might be Firefox only, but I had a hard time selecting the connection points.
- Dragging the mouse along the edge should pan. Otherwise you have to drop the connection and zoom.
- I appreciate the added "show solution". But it's not really giving you a solution. It's just a better hint.
- An option to show all tests or at least more tests would get great.
I agree with you, because I feel like I only got that one because I happened to get curious about CMOS (PMOS + NMOS) logic earlier this year, and remembered the general idea from before. Otherwise, I don't think I would have figured that out either. Google image search for CMOS NAND basically shows the solution, but the game doesn't tell you that's what it is until after you beat the level. I think seeing the answer, then immediate trying to reproduce it from memory is a good way to learn. Then if you try again the next day/week/month and are still able to remember it, then you've learned it.
I also looked up a solution for the full adder since I couldn't quite remember how it worked.
Tangentially, I've gone through similar material over time repeatedly in the games nandgame and Turing Complete, going through the Nand 2 Tetris course (on Coursera), building Ben Eater's breadboard 8-bit computer, reading "Code" by Charles Petzold and "The Pattern on the Stone" by Danny Hillis and "Digital Computer Electronics" by Malvino since that was what Ben Eater partly based his computer design on, and going over digital logic in CS-related EE courses up through how a CPU is made. But most of those barely cover anything below the logic gate level and I don't think any of them covered CMOS/NMOS/PMOS specifically which is why I got curious about them this year.
It's pretty fun though (my type of fun anyway), and I'm really curious to see how the rest of it goes since it's building a GPU instead of a CPU for a change.
- for the load javascript from that page imposes on CPU. +15 °C in less than 30 seconds. Nothing on the page could justify that.
I see a difficulty pop up after I click "run tests" but it then gets hidden and doesn't do anything.
This was after selecting intermediate on the truth tables level, then clicking "next level" from there.
For the PMOS, the output toggles between 1 and 0 (opposite the gate) as expected. However, for the NMOS, the output is always 0.
I don't understand why GND pulls VDD down to 0 for the NMOS, but not the PMOS.
One note: It isn't immediately obvious that the In/Out nodes can be connected to multiple wires, made the first few rounds harder to work thru.
Well done and keep it up :)
Also when you give a solution, you probably need an explanation of why that works.
Can't wait till you add the additional coming soon levels.
Your feedback feature seems broken. I tried giving feedback about some basic bugs and it kept saying can't send message.
Please also add a waitlist to notify when you release the additional levels.
Some like Human Resource Machine take the approachof
I wish Turing Complete wasn't quite so buggy or awkward, for a while it was by far the most promising of the bunch, but it's never quite polished and it's ended up in a bit of frustrating state.
Notable mention also to The Signal State, Shenzhen I/O, and TIS100 which are higher level than this, but scratch a similar itch.
there's ones like TIS100 which I keep meaning to revisit, but I find it very difficult to get back into these games without starting from scratch, and resetting my TIS100 progress is too intimidating.
* Sometimes explanations are overly lacking, other times they get repetitive. This feels like it needs to be accompanied by a course to fully deliver value. For instance, we're kind of thrown into truth gates without having really gone over them. And understanding how to combine NMOS and PMOS gates could use a better intro. Once I knew the answers, I got my brain to reset to my VLSI course from college, but I think a better primer could've accomplished that. In other places, I feel like we get more refreshers on some components than others.
* The routing algorithm needs to be better. I get a lot of staircase wires and straight up overlaps.
* Right clicking should clear attempted connections.
* There should be away to delete components you've placed. Maybe I just couldn't figure it out.
* I think icons should be included on the components pane. I kept clicking NOR when I wanted NOT and a better visual cue would have helped.
* It feels like difficulty is all over the place. Perhaps this is corrected with better explanations, but creating the NAND gates and NOR gates were much more difficult compared to AND and OR. Perhaps actually having us construct those gates without NOT would change the difficulty curve.
* The success overlay shows up too fast. Especially on levels that are just a demonstration (like the NMOS and PMOS Again levels) you don't get to to see everything the level is trying to demonstrate before the level announces that you have succeeded.
* In the intros, when there are new components, their description pops in. Instead, it should just advance like a slide. It's very jarring.
* Also, it's unclear that those aren't part of the intro. Maybe instead of popping them up, flash the little information icon next to them.
* What you call a capacitor I believe is actually a combination of a transistor and a capacitor. I think people will be hard pressed to find documentation on a capacitor with an enable switch. But, then you use this same capacitor to form a 1T1C cell. I'm rather confused.
* Many times when I finished a level, the circuit would switch to a prior level's solution.
* Some components have the same letters for every terminal (e.g. half-adders), meaning you need to scroll over the terminals to know what they do.
* Some levels have many test cases, and there's now way to see them all.
* Level 2.3 talks about us having registers, but we never covered those. In fact, I think we're still a ways away since we need to get from switches to flip-flops then to registers.
There isn't much order to this. Just what I recorded while working through it. Overall it's pretty good, I just think polish would got quite a ways.
Thank you for sharing this! I'm really excited to get to the more GPU specific parts. I basically did this for CPUs in college and I'm excited to see what preconception and missing conceptions I have for GPUs.
I'll be uploading arcs 3 and 4 soon (which will be programming the CPU and the start of GPU arch soon (people have gone through arcs 1 and 2 slightly faster than I expected)
Edit: Confirmed fixed.
Im a software dev, so not that much hardware experience
For level 1.1 the solution is basically to take the ground and use that as a singular input to the source pin of an nmos transistor, let the input to the level be the gate pin of that same nmos transistor, and to let the drain (top) pin of that nmos transistor connect to the level's output
Thank you for the game by the way! It's nice to recall my asic classes, and looking forward to GPU specific chapters.
Teaching is challenging stuff. You have to step out of your current mindset and think with the mind of someone that sees this stuff for the first time. It is not easy to make things look easy and simple. Specifically, I think you need a lot more exploration about cmos logic, about how one side pulls the output up or the other side pulls the output down but they are never on at the same time, about how they effectively amplify the result so the output does not have to depend on the power of the input, etc. Perhaps you can try to have people design things in NMOS logic than in PMOS logic and then combine the two to make a CMOS design to see how they complement each other.
But I do not want to discourage you. This is a very promising start and you should continue if you have the time.
Also, the timed answers -- are you kidding me? The time is waaay too short. And you fail all if you fail a single answer. Oh what is 0xDE in decimal, all I have to do is multiply 16 by 13 and add 14 to that. In my head in 12 seconds. Also the time is not sufficient for filling out truth tables, especially with a laptop trackpad. I was able to pass the truth tables, but gave up on hexracing.
Ok and here are some more specific issues.
-The wires seem to snap in position in a way that they superimpose each other so it becomes very difficult to see what your circuit is doing.
- truth tables seem to be bugged. If you have more inputs than the gate whose truth table you are looking at, sometimes it will generate a fictitious truth table with extra inputs. Thus, some times i get a NOT truth table that has two inputs.
- the ground element should have its connection circle on the top, not the bottom. I realized that you can rotate by pressing R, but the site does not mention that anywhere.
I intentionally made it s.t the truth tables are based on not just the input into the node, but based on all actual inputs to the node (so if you have additional processing on input x and y, itll show you the not w/ respect to input x and y and not just the immediate input).
will add a rotating cue in the next update
I didn't actually finish Act 2, but it seems to end in a conventional processor with the GPU first coming after another two acts currently under construction.
also it kept showing the same table to me like 4 times
We need more games like this so that the younger population get some sort of exposure to the hardware side of things, before AI takes over that field. I would also think that take-home electronic and soldering kits for adults and younger folks would be another way to reduce dependance on AI.
G0 = D0 AND SEL
G1 = NOT SEL
G2 = D1 AND G1
G0 -> Ans
G2 -> Ans
I don't see any button labeled that